control1.fit.qmsg

16位CUPIP核,完全运行的好的东西,可以直接拿来用的!

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 168 06/22/2005 Service Pack 1.21 SJ Full Version " "Info: Version 5.0 Build 168 06/22/2005 Service Pack 1.21 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Apr 25 16:54:41 2006 " "Info: Processing started: Tue Apr 25 16:54:41 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off control1 -c control1 " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off control1 -c control1" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "control1 EP1C6Q240C8 " "Info: Selected device EP1C6Q240C8 for design \"control1\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C12Q240C8 " "Info: Device EP1C12Q240C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "46 46 " "Info: No exact pin location assignment(s) for 46 pins of 46 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[6\] " "Info: Pin instrReg\[6\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[6\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[6] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[7\] " "Info: Pin instrReg\[7\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[7\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[7] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[8\] " "Info: Pin instrReg\[8\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[8\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[8] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[8] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[9\] " "Info: Pin instrReg\[9\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[9\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[9] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[9] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[10\] " "Info: Pin instrReg\[10\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[10\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[10] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[10] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "progCntrWr " "Info: Pin progCntrWr not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 10 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "progCntrWr" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { progCntrWr } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { progCntrWr } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "progCntrRd " "Info: Pin progCntrRd not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 11 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "progCntrRd" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { progCntrRd } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { progCntrRd } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "addrRegWr " "Info: Pin addrRegWr not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 12 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "addrRegWr" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { addrRegWr } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { addrRegWr } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "addrRegRd " "Info: Pin addrRegRd not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 13 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "addrRegRd" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { addrRegRd } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { addrRegRd } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "outRegWr " "Info: Pin outRegWr not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 14 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "outRegWr" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { outRegWr } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { outRegWr } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "outRegRd " "Info: Pin outRegRd not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 15 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "outRegRd" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { outRegRd } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { outRegRd } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "shiftSel\[0\] " "Info: Pin shiftSel\[0\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 16 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "shiftSel\[0\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { shiftSel[0] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { shiftSel[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "shiftSel\[1\] " "Info: Pin shiftSel\[1\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 16 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "shiftSel\[1\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { shiftSel[1] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { shiftSel[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "shiftSel\[2\] " "Info: Pin shiftSel\[2\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 16 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "shiftSel\[2\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { shiftSel[2] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { shiftSel[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "aluSel\[0\] " "Info: Pin aluSel\[0\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 17 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "aluSel\[0\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { aluSel[0] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { aluSel[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "aluSel\[1\] " "Info: Pin aluSel\[1\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 17 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "aluSel\[1\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { aluSel[1] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { aluSel[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "aluSel\[2\] " "Info: Pin aluSel\[2\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 17 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "aluSel\[2\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { aluSel[2] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { aluSel[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "aluSel\[3\] " "Info: Pin aluSel\[3\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 17 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "aluSel\[3\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { aluSel[3] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { aluSel[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "compSel\[0\] " "Info: Pin compSel\[0\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 18 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "compSel\[0\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { compSel[0] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { compSel[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "compSel\[1\] " "Info: Pin compSel\[1\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 18 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "compSel\[1\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { compSel[1] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { compSel[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "compSel\[2\] " "Info: Pin compSel\[2\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 18 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "compSel\[2\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { compSel[2] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { compSel[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "opRegRd " "Info: Pin opRegRd not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 19 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "opRegRd" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { opRegRd } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { opRegRd } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "opRegWr " "Info: Pin opRegWr not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 20 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "opRegWr" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { opRegWr } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { opRegWr } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrWr " "Info: Pin instrWr not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 21 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrWr" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrWr } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrWr } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "regSel\[0\] " "Info: Pin regSel\[0\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 22 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "regSel\[0\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { regSel[0] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { regSel[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "regSel\[1\] " "Info: Pin regSel\[1\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 22 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "regSel\[1\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { regSel[1] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { regSel[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "regSel\[2\] " "Info: Pin regSel\[2\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 22 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "regSel\[2\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { regSel[2] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { regSel[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "regRd " "Info: Pin regRd not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 23 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "regRd" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { regRd } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { regRd } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "regWr " "Info: Pin regWr not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 24 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "regWr" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { regWr } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { regWr } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rw " "Info: Pin rw not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 25 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rw" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { rw } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { rw } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "vma " "Info: Pin vma not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 26 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "vma" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { vma } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { vma } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ready " "Info: Pin ready not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 9 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ready" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { ready } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { ready } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[13\] " "Info: Pin instrReg\[13\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[13\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[13] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[13] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[15\] " "Info: Pin instrReg\[15\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[15\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[15] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[15] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[12\] " "Info: Pin instrReg\[12\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[12\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[12] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[12] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[14\] " "Info: Pin instrReg\[14\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[14\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[14] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[14] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[11\] " "Info: Pin instrReg\[11\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[11\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[11] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[11] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[0\] " "Info: Pin instrReg\[0\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[0\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[0] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[3\] " "Info: Pin instrReg\[3\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[3\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[3] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[1\] " "Info: Pin instrReg\[1\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[1\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[1] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[4\] " "Info: Pin instrReg\[4\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[4\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[4] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[2\] " "Info: Pin instrReg\[2\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[2\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[2] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "instrReg\[5\] " "Info: Pin instrReg\[5\] not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 7 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "instrReg\[5\]" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { instrReg[5] } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { instrReg[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clock " "Info: Pin clock not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 5 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clock" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { clock } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { clock } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "reset " "Info: Pin reset not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 6 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "reset" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { reset } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { reset } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "compout " "Info: Pin compout not assigned to an exact location on the device" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 8 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "compout" } } } } { "E:/cpu_a/db/control1_cmp.qrpt" "" { Report "E:/cpu_a/db/control1_cmp.qrpt" Compiler "control1" "UNKNOWN" "V1" "E:/cpu_a/db/control1.quartus_db" { Floorplan "E:/cpu_a/" "" "" { compout } "NODE_NAME" } "" } } { "E:/cpu_a/control1.fld" "" { Floorplan "E:/cpu_a/control1.fld" "" "" { compout } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clock Global clock in PIN 29 " "Info: Automatically promoted signal \"clock\" to use Global clock in PIN 29" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 5 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "reset Global clock in PIN 28 " "Info: Automatically promoted signal \"reset\" to use Global clock in PIN 28" {  } { { "control1.vhd" "" { Text "E:/cpu_a/control1.vhd" 6 -1 0 } }  } 0}