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📄 step9.vqm

📁 16位CUPIP核,完全运行的好的东西,可以直接拿来用的!
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defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella6 .sum_lutc_input = "cin";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella6 .lut_mask = "A50A";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella6 .output_mode = "reg_only";

cyclone_lcell \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7 (
	.clk(\CLK~combout ),
	.dataa(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[7] ),
	.aclr(gnd),
	.cin(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella6~COUT ),
	.regout(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[7] ),
	.cout(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7~COUT ));
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7 .operation_mode = "arithmetic";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7 .synch_mode = "off";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7 .register_cascade_mode = "off";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7 .sum_lutc_input = "cin";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7 .lut_mask = "5A5F";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7 .output_mode = "reg_only";

cyclone_lcell \SCHKT:inst1|CLKA~60_I (
	.dataa(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[7] ),
	.datab(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[4] ),
	.datac(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[5] ),
	.datad(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[6] ),
	.combout(\SCHKT:inst1|CLKA~60 ));
defparam \SCHKT:inst1|CLKA~60_I .operation_mode = "normal";
defparam \SCHKT:inst1|CLKA~60_I .synch_mode = "off";
defparam \SCHKT:inst1|CLKA~60_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|CLKA~60_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|CLKA~60_I .lut_mask = "7FFF";
defparam \SCHKT:inst1|CLKA~60_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8 (
	.clk(\CLK~combout ),
	.datab(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[8] ),
	.aclr(gnd),
	.cin(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella7~COUT ),
	.regout(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[8] ),
	.cout(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8~COUT ));
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8 .operation_mode = "arithmetic";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8 .synch_mode = "off";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8 .register_cascade_mode = "off";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8 .sum_lutc_input = "cin";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8 .lut_mask = "C30C";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8 .output_mode = "reg_only";

cyclone_lcell \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella9 (
	.clk(\CLK~combout ),
	.dataa(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[9] ),
	.aclr(gnd),
	.cin(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella8~COUT ),
	.regout(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[9] ));
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella9 .operation_mode = "normal";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella9 .synch_mode = "off";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella9 .register_cascade_mode = "off";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella9 .sum_lutc_input = "cin";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella9 .lut_mask = "5A5A";
defparam \SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|counter_cella9 .output_mode = "reg_only";

cyclone_lcell \SCHKT:inst1|CLKA~61_I (
	.dataa(\SCHKT:inst1|CLKA~60 ),
	.datab(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[9] ),
	.datac(\SCHKT:inst1|CLKA~59 ),
	.datad(\SCHKT:inst1|lpm_counter:CT8_rtl_0|cntr_pt6:auto_generated|safe_q[8] ),
	.combout(\SCHKT:inst1|CLKA~61 ));
defparam \SCHKT:inst1|CLKA~61_I .operation_mode = "normal";
defparam \SCHKT:inst1|CLKA~61_I .synch_mode = "off";
defparam \SCHKT:inst1|CLKA~61_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|CLKA~61_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|CLKA~61_I .lut_mask = "0400";
defparam \SCHKT:inst1|CLKA~61_I .output_mode = "comb_only";

cyclone_io \NESW~I (
	.combout(\NESW~combout ),
	.padio(NESW));
defparam \NESW~I .operation_mode = "input";
defparam \NESW~I .input_register_mode = "none";
defparam \NESW~I .output_register_mode = "none";
defparam \NESW~I .oe_register_mode = "none";
defparam \NESW~I .input_async_reset = "none";
defparam \NESW~I .output_async_reset = "none";
defparam \NESW~I .oe_async_reset = "none";
defparam \NESW~I .input_sync_reset = "none";
defparam \NESW~I .output_sync_reset = "none";
defparam \NESW~I .oe_sync_reset = "none";
defparam \NESW~I .input_power_up = "low";
defparam \NESW~I .output_power_up = "low";
defparam \NESW~I .oe_power_up = "low";

cyclone_lcell \SCHKT:inst1|Mux~3600_I (
	.dataa(\SCHKT:inst1|Q[4] ),
	.datab(\NESW~combout ),
	.datac(\SCHKT:inst1|Q[3] ),
	.datad(\SCHKT:inst1|Mux~3596 ),
	.combout(\SCHKT:inst1|Mux~3600 ));
defparam \SCHKT:inst1|Mux~3600_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3600_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3600_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3600_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3600_I .lut_mask = "0900";
defparam \SCHKT:inst1|Mux~3600_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|LOK[0]~I (
	.clk(\SCHKT:inst1|CLKA~61 ),
	.datad(\SCHKT:inst1|LOK[0] ),
	.aclr(gnd),
	.regout(\SCHKT:inst1|LOK[0] ));
defparam \SCHKT:inst1|LOK[0]~I .operation_mode = "normal";
defparam \SCHKT:inst1|LOK[0]~I .synch_mode = "off";
defparam \SCHKT:inst1|LOK[0]~I .register_cascade_mode = "off";
defparam \SCHKT:inst1|LOK[0]~I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|LOK[0]~I .lut_mask = "00FF";
defparam \SCHKT:inst1|LOK[0]~I .output_mode = "reg_only";

cyclone_lcell \SCHKT:inst1|CT2[1]~I (
	.clk(\SCHKT:inst1|CLKA~61 ),
	.datad(\SCHKT:inst1|CT2[1] ),
	.aclr(gnd),
	.ena(\SCHKT:inst1|__ALT_INV__LOK[0] ),
	.regout(\SCHKT:inst1|CT2[1] ));
defparam \SCHKT:inst1|CT2[1]~I .operation_mode = "normal";
defparam \SCHKT:inst1|CT2[1]~I .synch_mode = "off";
defparam \SCHKT:inst1|CT2[1]~I .register_cascade_mode = "off";
defparam \SCHKT:inst1|CT2[1]~I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|CT2[1]~I .lut_mask = "00FF";
defparam \SCHKT:inst1|CT2[1]~I .output_mode = "reg_only";

cyclone_lcell \SCHKT:inst1|LOK[1]~I (
	.clk(\SCHKT:inst1|CLKA~61 ),
	.datac(\SCHKT:inst1|CT2[1] ),
	.datad(\NESW~combout ),
	.aclr(gnd),
	.sload(vcc),
	.combout(\SCHKT:inst1|process0~2 ),
	.regout(\SCHKT:inst1|LOK[1] ));
defparam \SCHKT:inst1|LOK[1]~I .operation_mode = "normal";
defparam \SCHKT:inst1|LOK[1]~I .synch_mode = "on";
defparam \SCHKT:inst1|LOK[1]~I .register_cascade_mode = "off";
defparam \SCHKT:inst1|LOK[1]~I .sum_lutc_input = "qfbk";
defparam \SCHKT:inst1|LOK[1]~I .lut_mask = "0FF0";
defparam \SCHKT:inst1|LOK[1]~I .output_mode = "reg_and_comb";

cyclone_lcell \SCHKT:inst1|Mux~3279_I (
	.dataa(\SCHKT:inst1|Q[1] ),
	.datac(\SCHKT:inst1|LOK[1] ),
	.datad(\SCHKT:inst1|LOK[0] ),
	.combout(\SCHKT:inst1|Mux~3279 ));
defparam \SCHKT:inst1|Mux~3279_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3279_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3279_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3279_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3279_I .lut_mask = "F5A0";
defparam \SCHKT:inst1|Mux~3279_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|Mux~3287_I (
	.dataa(\SCHKT:inst1|Q[3] ),
	.datab(\SCHKT:inst1|Q[2] ),
	.datac(\SCHKT:inst1|Q[4] ),
	.datad(\SCHKT:inst1|Mux~3279 ),
	.combout(\SCHKT:inst1|Mux~3287 ));
defparam \SCHKT:inst1|Mux~3287_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3287_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3287_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3287_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3287_I .lut_mask = "CB4A";
defparam \SCHKT:inst1|Mux~3287_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|Mux~3288_I (
	.dataa(\SCHKT:inst1|Q[3] ),
	.datab(\SCHKT:inst1|Q[2] ),
	.datac(\SCHKT:inst1|Q[4] ),
	.datad(\SCHKT:inst1|Mux~3279 ),
	.combout(\SCHKT:inst1|Mux~3288 ));
defparam \SCHKT:inst1|Mux~3288_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3288_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3288_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3288_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3288_I .lut_mask = "4D4C";
defparam \SCHKT:inst1|Mux~3288_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|Mux~3294_I (
	.dataa(\NESW~combout ),
	.datab(\SCHKT:inst1|Q[0] ),
	.datac(\SCHKT:inst1|Mux~3287 ),
	.datad(\SCHKT:inst1|Mux~3288 ),
	.combout(\SCHKT:inst1|Mux~3294 ));
defparam \SCHKT:inst1|Mux~3294_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3294_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3294_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3294_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3294_I .lut_mask = "695A";
defparam \SCHKT:inst1|Mux~3294_I .output_mode = "comb_only";

cyclone_io \RESET~I (
	.combout(\RESET~combout ),
	.padio(RESET));
defparam \RESET~I .operation_mode = "input";
defparam \RESET~I .input_register_mode = "none";
defparam \RESET~I .output_register_mode = "none";
defparam \RESET~I .oe_register_mode = "none";
defparam \RESET~I .input_async_reset = "none";
defparam \RESET~I .output_async_reset = "none";
defparam \RESET~I .oe_async_reset = "none";
defparam \RESET~I .input_sync_reset = "none";
defparam \RESET~I .output_sync_reset = "none";
defparam \RESET~I .oe_sync_reset = "none";
defparam \RESET~I .input_power_up = "low";
defparam \RESET~I .output_power_up = "low";
defparam \RESET~I .oe_power_up = "low";

cyclone_lcell \SCHKT:inst1|Q[1]~I (
	.clk(\CLK~combout ),
	.dataa(\SCHKT:inst1|Q[5] ),
	.datab(\SCHKT:inst1|Q[0] ),
	.datac(\SCHKT:inst1|Q[1] ),
	.datad(\SCHKT:inst1|Mux~3294 ),
	.aclr(\RESET~combout ),
	.regout(\SCHKT:inst1|Q[1] ));
defparam \SCHKT:inst1|Q[1]~I .operation_mode = "normal";
defparam \SCHKT:inst1|Q[1]~I .synch_mode = "off";
defparam \SCHKT:inst1|Q[1]~I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Q[1]~I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Q[1]~I .lut_mask = "0014";
defparam \SCHKT:inst1|Q[1]~I .output_mode = "reg_only";

cyclone_lcell \SCHKT:inst1|Mux~109_I (
	.datab(\SCHKT:inst1|Q[0] ),
	.datac(\SCHKT:inst1|Q[4] ),
	.datad(\NESW~combout ),
	.combout(\SCHKT:inst1|Mux~109 ));
defparam \SCHKT:inst1|Mux~109_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~109_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~109_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~109_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~109_I .lut_mask = "03FC";
defparam \SCHKT:inst1|Mux~109_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|Mux~3601_I (
	.dataa(\SCHKT:inst1|Q[4] ),
	.datab(\NESW~combout ),
	.datac(\SCHKT:inst1|Q[0] ),
	.datad(\SCHKT:inst1|LOK[1] ),
	.combout(\SCHKT:inst1|Mux~3601 ));
defparam \SCHKT:inst1|Mux~3601_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3601_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3601_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3601_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3601_I .lut_mask = "F6FC";
defparam \SCHKT:inst1|Mux~3601_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|Mux~3605_I (
	.dataa(\SCHKT:inst1|Q[4] ),
	.datab(\SCHKT:inst1|Q[2] ),
	.datac(\SCHKT:inst1|Q[0] ),
	.datad(\SCHKT:inst1|LOK[0] ),
	.combout(\SCHKT:inst1|Mux~3605 ));
defparam \SCHKT:inst1|Mux~3605_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3605_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3605_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3605_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3605_I .lut_mask = "21A1";
defparam \SCHKT:inst1|Mux~3605_I .output_mode = "comb_only";

cyclone_lcell \SCHKT:inst1|Mux~3606_I (
	.dataa(\SCHKT:inst1|Q[1] ),
	.datab(\SCHKT:inst1|Q[2] ),
	.datac(\NESW~combout ),
	.datad(\SCHKT:inst1|Mux~3605 ),
	.combout(\SCHKT:inst1|Mux~3606 ));
defparam \SCHKT:inst1|Mux~3606_I .operation_mode = "normal";
defparam \SCHKT:inst1|Mux~3606_I .synch_mode = "off";
defparam \SCHKT:inst1|Mux~3606_I .register_cascade_mode = "off";
defparam \SCHKT:inst1|Mux~3606_I .sum_lutc_input = "datac";
defparam \SCHKT:inst1|Mux~3606_I .lut_mask = "8DD8";
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