control1.map.eqn

16位CUPIP核,完全运行的好的东西,可以直接拿来用的!

--A1L131 is Select~896
--operation mode is normal

A1L131 = A1L031 # current_state.execute & (instrReg[14] # instrReg[15]);


--A1L401 is reduce_or~309
--operation mode is normal

A1L401 = !current_state.load2 & !current_state.move2;


--current_state.store3 is current_state.store3
--operation mode is normal

current_state.store3_lut_out = current_state.store2;
current_state.store3 = DFFEAS(current_state.store3_lut_out, clock, !reset, , , , , , );


--A1L501 is reduce_or~310
--operation mode is normal

A1L501 = A1L301 & A1L401 & !current_state.bgti2 & !current_state.store3;


--A1L231 is Select~897
--operation mode is normal

A1L231 = !A1L731 & (A1L921 & instrReg[0] # !A1L921 & (instrReg[3]));


--A1L331 is Select~898
--operation mode is normal

A1L331 = !A1L731 & (A1L921 & instrReg[1] # !A1L921 & (instrReg[4]));


--A1L431 is Select~899
--operation mode is normal

A1L431 = !A1L731 & (A1L921 & instrReg[2] # !A1L921 & (instrReg[5]));


--A1L28 is Mux~92
--operation mode is normal

A1L28 = !instrReg[14] & (instrReg[12] # instrReg[11] & !instrReg[13]);


--current_state.reset5 is current_state.reset5
--operation mode is normal

current_state.reset5_lut_out = current_state.reset4;
current_state.reset5 = DFFEAS(current_state.reset5_lut_out, clock, !reset, , , , , , );


--A1L601 is reduce_or~311
--operation mode is normal

A1L601 = current_state.bgti10 # current_state.brai6 # current_state.loadi6 # current_state.reset5;


--current_state.load3 is current_state.load3
--operation mode is normal

current_state.load3_lut_out = current_state.load2;
current_state.load3 = DFFEAS(current_state.load3_lut_out, clock, !reset, , , , , , );


--current_state.incpc5 is current_state.incpc5
--operation mode is normal

current_state.incpc5_lut_out = current_state.incpc4;
current_state.incpc5 = DFFEAS(current_state.incpc5_lut_out, clock, !reset, , , , , , );


--current_state.loadpc3 is current_state.loadpc3
--operation mode is normal

current_state.loadpc3_lut_out = current_state.loadpc2;
current_state.loadpc3 = DFFEAS(current_state.loadpc3_lut_out, clock, !reset, , , , , , );


--current_state.bgti9 is current_state.bgti9
--operation mode is normal

current_state.bgti9_lut_out = current_state.bgti8;
current_state.bgti9 = DFFEAS(current_state.bgti9_lut_out, clock, !reset, , , , , , );


--A1L701 is reduce_or~312
--operation mode is normal

A1L701 = current_state.load3 # current_state.incpc5 # current_state.loadpc3 # current_state.bgti9;


--current_state.brai5 is current_state.brai5
--operation mode is normal

current_state.brai5_lut_out = current_state.brai4;
current_state.brai5 = DFFEAS(current_state.brai5_lut_out, clock, !reset, , , , , , );


--current_state.loadi5 is current_state.loadi5
--operation mode is normal

current_state.loadi5_lut_out = current_state.loadi4;
current_state.loadi5 = DFFEAS(current_state.loadi5_lut_out, clock, !reset, , , , , , );


--A1L801 is reduce_or~313
--operation mode is normal

A1L801 = A1L701 # current_state.brai5 # current_state.loadi5;


--A1L901 is reduce_or~314
--operation mode is normal

A1L901 = !current_state.reset6 & !current_state.incpc6 & !current_state.loadpc4;


--A1L011 is reduce_or~315
--operation mode is normal

A1L011 = current_state.load4 # A1L601 # A1L801 # !A1L901;


--A1L58 is next_state.bgti2~15
--operation mode is normal

A1L58 = current_state.execute & (!instrReg[14] & !instrReg[15]);


--A1L38 is Mux~93
--operation mode is normal

A1L38 = !instrReg[14] & (instrReg[11] # instrReg[12] # instrReg[13]);


--A1L68 is next_state.incpc~34
--operation mode is normal

A1L68 = current_state.store3 # current_state.execute & (instrReg[15] # !A1L38);


--A1L531 is Select~901
--operation mode is normal

A1L531 = current_state.execute & !instrReg[15] & A1L28 # !A1L501;


--A1L631 is Select~902
--operation mode is normal

A1L631 = A1L201 & !current_state.load4 & !current_state.execute & A1L501;


--A1L731 is Select~903
--operation mode is normal

A1L731 = A1L131 $ (current_state.loadi6 & (!ready) # !current_state.loadi6 & A1L631);


--instrReg[6] is instrReg[6]
--operation mode is input

instrReg[6] = INPUT();


--instrReg[7] is instrReg[7]
--operation mode is input

instrReg[7] = INPUT();


--instrReg[8] is instrReg[8]
--operation mode is input

instrReg[8] = INPUT();


--instrReg[9] is instrReg[9]
--operation mode is input

instrReg[9] = INPUT();


--instrReg[10] is instrReg[10]
--operation mode is input

instrReg[10] = INPUT();


--ready is ready
--operation mode is input

ready = INPUT();


--instrReg[13] is instrReg[13]
--operation mode is input

instrReg[13] = INPUT();


--instrReg[15] is instrReg[15]
--operation mode is input

instrReg[15] = INPUT();


--instrReg[12] is instrReg[12]
--operation mode is input

instrReg[12] = INPUT();


--instrReg[14] is instrReg[14]
--operation mode is input

instrReg[14] = INPUT();


--instrReg[11] is instrReg[11]
--operation mode is input

instrReg[11] = INPUT();


--instrReg[0] is instrReg[0]
--operation mode is input

instrReg[0] = INPUT();


--instrReg[3] is instrReg[3]
--operation mode is input

instrReg[3] = INPUT();


--instrReg[1] is instrReg[1]
--operation mode is input

instrReg[1] = INPUT();


--instrReg[4] is instrReg[4]
--operation mode is input

instrReg[4] = INPUT();


--instrReg[2] is instrReg[2]
--operation mode is input

instrReg[2] = INPUT();


--instrReg[5] is instrReg[5]
--operation mode is input

instrReg[5] = INPUT();


--clock is clock
--operation mode is input

clock = INPUT();


--reset is reset
--operation mode is input

reset = INPUT();


--compout is compout
--operation mode is input

compout = INPUT();


--progCntrWr is progCntrWr
--operation mode is output

progCntrWr = OUTPUT(A1L911);


--progCntrRd is progCntrRd
--operation mode is output

progCntrRd = OUTPUT(A1L321);


--addrRegWr is addrRegWr
--operation mode is output

addrRegWr = OUTPUT(A1L79);


--addrRegRd is addrRegRd
--operation mode is output

addrRegRd = OUTPUT(GND);


--outRegWr is outRegWr
--operation mode is output

outRegWr = OUTPUT(A1L59);


--outRegRd is outRegRd
--operation mode is output

outRegRd = OUTPUT(A1L69);


--shiftSel[0] is shiftSel[0]
--operation mode is output

shiftSel[0] = OUTPUT(GND);


--shiftSel[1] is shiftSel[1]
--operation mode is output

shiftSel[1] = OUTPUT(GND);


--shiftSel[2] is shiftSel[2]
--operation mode is output

shiftSel[2] = OUTPUT(GND);


--aluSel[0] is aluSel[0]
--operation mode is output

aluSel[0] = OUTPUT(A1L521);


--aluSel[1] is aluSel[1]
--operation mode is output

aluSel[1] = OUTPUT(!A1L421);


--aluSel[2] is aluSel[2]
--operation mode is output

aluSel[2] = OUTPUT(!A1L421);


--aluSel[3] is aluSel[3]
--operation mode is output

aluSel[3] = OUTPUT(!A1L8);


--compSel[0] is compSel[0]
--operation mode is output

compSel[0] = OUTPUT(GND);


--compSel[1] is compSel[1]
--operation mode is output

compSel[1] = OUTPUT(!A1L51);


--compSel[2] is compSel[2]
--operation mode is output

compSel[2] = OUTPUT(GND);


--opRegRd is opRegRd
--operation mode is output

opRegRd = OUTPUT(!A1L51);


--opRegWr is opRegWr
--operation mode is output

opRegWr = OUTPUT(current_state.bgti2);


--instrWr is instrWr
--operation mode is output

instrWr = OUTPUT(A1L621);


--regSel[0] is regSel[0]
--operation mode is output

regSel[0] = OUTPUT(A1L231);


--regSel[1] is regSel[1]
--operation mode is output

regSel[1] = OUTPUT(A1L331);


--regSel[2] is regSel[2]
--operation mode is output

regSel[2] = OUTPUT(A1L431);


--regRd is regRd
--operation mode is output

regRd = OUTPUT(A1L531);


--regWr is regWr
--operation mode is output

regWr = OUTPUT(!A1L821);


--rw is rw
--operation mode is output

rw = OUTPUT(current_state.store3);


--vma is vma
--operation mode is output

vma = OUTPUT(A1L011);