dds.fit.eqn

用FPGA实现DDS,可变频,幅值由硬件完成

D1L19_carry_eqn = (!D1L26 & D1L23) # (D1L26 & D1L24);
D1L19 = D1_tout[6] $ !D1L19_carry_eqn;

--D1L20 is fp:inst2|add~249 at LC_X21_Y4_N6
--operation mode is arithmetic

D1L20_cout_0 = D1_tout[6] & !D1L23;
D1L20 = CARRY(D1L20_cout_0);

--D1L21 is fp:inst2|add~249COUT1_290 at LC_X21_Y4_N6
--operation mode is arithmetic

D1L21_cout_1 = D1_tout[6] & !D1L24;
D1L21 = CARRY(D1L21_cout_1);


--D1L22 is fp:inst2|add~252 at LC_X21_Y4_N5
--operation mode is arithmetic

D1L22_carry_eqn = (!D1L26 & GND) # (D1L26 & VCC);
D1L22 = D1_tout[5] $ D1L22_carry_eqn;

--D1L23 is fp:inst2|add~254 at LC_X21_Y4_N5
--operation mode is arithmetic

D1L23_cout_0 = !D1L26 # !D1_tout[5];
D1L23 = CARRY(D1L23_cout_0);

--D1L24 is fp:inst2|add~254COUT1_289 at LC_X21_Y4_N5
--operation mode is arithmetic

D1L24_cout_1 = !D1L26 # !D1_tout[5];
D1L24 = CARRY(D1L24_cout_1);


--D1L25 is fp:inst2|add~257 at LC_X21_Y4_N4
--operation mode is arithmetic

D1L25 = D1_tout[4] $ (!D1L30);

--D1L26 is fp:inst2|add~259 at LC_X21_Y4_N4
--operation mode is arithmetic

D1L26 = D1L27;


--D1L29 is fp:inst2|add~262 at LC_X21_Y4_N3
--operation mode is arithmetic

D1L29 = D1_tout[3] $ D1L36;

--D1L30 is fp:inst2|add~264 at LC_X21_Y4_N3
--operation mode is arithmetic

D1L30_cout_0 = !D1L36 # !D1_tout[3];
D1L30 = CARRY(D1L30_cout_0);

--D1L31 is fp:inst2|add~264COUT1 at LC_X21_Y4_N3
--operation mode is arithmetic

D1L31_cout_1 = !D1L37 # !D1_tout[3];
D1L31 = CARRY(D1L31_cout_1);


--D1L32 is fp:inst2|add~267 at LC_X21_Y4_N1
--operation mode is arithmetic

D1L32 = D1_tout[1] $ (D1L39);

--D1L33 is fp:inst2|add~269 at LC_X21_Y4_N1
--operation mode is arithmetic

D1L33_cout_0 = !D1L39 # !D1_tout[1];
D1L33 = CARRY(D1L33_cout_0);

--D1L34 is fp:inst2|add~269COUT1_287 at LC_X21_Y4_N1
--operation mode is arithmetic

D1L34_cout_1 = !D1L40 # !D1_tout[1];
D1L34 = CARRY(D1L34_cout_1);


--D1L35 is fp:inst2|add~272 at LC_X21_Y4_N2
--operation mode is arithmetic

D1L35 = D1_tout[2] $ (!D1L33);

--D1L36 is fp:inst2|add~274 at LC_X21_Y4_N2
--operation mode is arithmetic

D1L36_cout_0 = D1_tout[2] & (!D1L33);
D1L36 = CARRY(D1L36_cout_0);

--D1L37 is fp:inst2|add~274COUT1_288 at LC_X21_Y4_N2
--operation mode is arithmetic

D1L37_cout_1 = D1_tout[2] & (!D1L34);
D1L37 = CARRY(D1L37_cout_1);


--D1L38 is fp:inst2|add~277 at LC_X21_Y4_N0
--operation mode is arithmetic

D1L38 = !D1_tout[0];

--D1L39 is fp:inst2|add~279 at LC_X21_Y4_N0
--operation mode is arithmetic

D1L39_cout_0 = D1_tout[0];
D1L39 = CARRY(D1L39_cout_0);

--D1L40 is fp:inst2|add~279COUT1_286 at LC_X21_Y4_N0
--operation mode is arithmetic

D1L40_cout_1 = D1_tout[0];
D1L40 = CARRY(D1L40_cout_1);


--N32L10 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1]~69 at LC_X16_Y6_N9
--operation mode is normal

N32L10 = N32_cout[0];


--clken is clken at PIN_159
--operation mode is input

clken = INPUT();


--clkin is clkin at PIN_29
--operation mode is input

clkin = INPUT();


--fr[0] is fr[0] at PIN_158
--operation mode is input

fr[0] = INPUT();


--fr[1] is fr[1] at PIN_161
--operation mode is input

fr[1] = INPUT();


--fr[2] is fr[2] at PIN_160
--operation mode is input

fr[2] = INPUT();


--fr[3] is fr[3] at PIN_163
--operation mode is input

fr[3] = INPUT();


--fr[4] is fr[4] at PIN_162
--operation mode is input

fr[4] = INPUT();


--fr[5] is fr[5] at PIN_165
--operation mode is input

fr[5] = INPUT();


--fr[6] is fr[6] at PIN_164
--operation mode is input

fr[6] = INPUT();


--fr[7] is fr[7] at PIN_167
--operation mode is input

fr[7] = INPUT();


--q7 is q7 at PIN_201
--operation mode is output

q7 = OUTPUT(G1_q_a[7]);


--q6 is q6 at PIN_198
--operation mode is output

q6 = OUTPUT(G1_q_a[6]);


--q5 is q5 at PIN_199
--operation mode is output

q5 = OUTPUT(G1_q_a[5]);


--q4 is q4 at PIN_196
--operation mode is output

q4 = OUTPUT(G1_q_a[4]);


--q3 is q3 at PIN_197
--operation mode is output

q3 = OUTPUT(G1_q_a[3]);


--q2 is q2 at PIN_194
--operation mode is output

q2 = OUTPUT(G1_q_a[2]);


--q1 is q1 at PIN_195
--operation mode is output

q1 = OUTPUT(G1_q_a[1]);


--q0 is q0 at PIN_188
--operation mode is output

q0 = OUTPUT(G1_q_a[0]);


--tt[7] is tt[7] at PIN_94
--operation mode is output

tt[7] = OUTPUT(G2_q_a[7]);


--tt[6] is tt[6] at PIN_87
--operation mode is output

tt[6] = OUTPUT(G2_q_a[6]);


--tt[5] is tt[5] at PIN_93
--operation mode is output

tt[5] = OUTPUT(G2_q_a[5]);


--tt[4] is tt[4] at PIN_88
--operation mode is output

tt[4] = OUTPUT(G2_q_a[4]);


--tt[3] is tt[3] at PIN_96
--operation mode is output

tt[3] = OUTPUT(G2_q_a[3]);


--tt[2] is tt[2] at PIN_95
--operation mode is output

tt[2] = OUTPUT(G2_q_a[2]);


--tt[1] is tt[1] at PIN_42
--operation mode is output

tt[1] = OUTPUT(G2_q_a[1]);


--tt[0] is tt[0] at PIN_86
--operation mode is output

tt[0] = OUTPUT(G2_q_a[0]);


--N32L6 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[0]~70 at LC_X16_Y6_N0
--operation mode is normal

N32L6 = !N32_sout_node[0];