dds.fit.eqn

用FPGA实现DDS,可变频,幅值由硬件完成

N14_sout_node[2]_lut_out = N14_sout_node[2] $ H1_q_a[5] $ !N14L6;
N14_sout_node[2] = DFFEAS(N14_sout_node[2]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N14L9 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~58 at LC_X19_Y12_N3
--operation mode is arithmetic

N14L9_cout_0 = N14_sout_node[2] & (H1_q_a[5] # !N14L6) # !N14_sout_node[2] & H1_q_a[5] & !N14L6;
N14L9 = CARRY(N14L9_cout_0);

--N14L10 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~58COUT1 at LC_X19_Y12_N3
--operation mode is arithmetic

N14L10_cout_1 = N14_sout_node[2] & (H1_q_a[5] # !N14L7) # !N14_sout_node[2] & H1_q_a[5] & !N14L7;
N14L10 = CARRY(N14L10_cout_1);


--N14_sout_node[3] is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3] at LC_X19_Y12_N4
--operation mode is arithmetic

N14_sout_node[3]_lut_out = H1_q_a[4] $ N14_sout_node[3] $ N14L9;
N14_sout_node[3] = DFFEAS(N14_sout_node[3]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N14L12 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~62 at LC_X19_Y12_N4
--operation mode is arithmetic

N14L12 = N14L13;


--N14_sout_node[4] is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] at LC_X19_Y12_N5
--operation mode is arithmetic

N14_sout_node[4]_carry_eqn = (!N14L12 & GND) # (N14L12 & VCC);
N14_sout_node[4]_lut_out = N14_sout_node[4] $ H1_q_a[3] $ !N14_sout_node[4]_carry_eqn;
N14_sout_node[4] = DFFEAS(N14_sout_node[4]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N14L16 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4]~66 at LC_X19_Y12_N5
--operation mode is arithmetic

N14L16_cout_0 = N14_sout_node[4] & (H1_q_a[3] # !N14L12) # !N14_sout_node[4] & H1_q_a[3] & !N14L12;
N14L16 = CARRY(N14L16_cout_0);

--N14L17 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4]~66COUT1_80 at LC_X19_Y12_N5
--operation mode is arithmetic

N14L17_cout_1 = N14_sout_node[4] & (H1_q_a[3] # !N14L12) # !N14_sout_node[4] & H1_q_a[3] & !N14L12;
N14L17 = CARRY(N14L17_cout_1);


--N14_sout_node[5] is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5] at LC_X19_Y12_N6
--operation mode is arithmetic

N14_sout_node[5]_carry_eqn = (!N14L12 & N14L16) # (N14L12 & N14L17);
N14_sout_node[5]_lut_out = N14_sout_node[5] $ H1_q_a[2] $ N14_sout_node[5]_carry_eqn;
N14_sout_node[5] = DFFEAS(N14_sout_node[5]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N14L19 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]~70 at LC_X19_Y12_N6
--operation mode is arithmetic

N14L19_cout_0 = N14_sout_node[5] & !H1_q_a[2] & !N14L16 # !N14_sout_node[5] & (!N14L16 # !H1_q_a[2]);
N14L19 = CARRY(N14L19_cout_0);

--N14L20 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]~70COUT1_81 at LC_X19_Y12_N6
--operation mode is arithmetic

N14L20_cout_1 = N14_sout_node[5] & !H1_q_a[2] & !N14L17 # !N14_sout_node[5] & (!N14L17 # !H1_q_a[2]);
N14L20 = CARRY(N14L20_cout_1);


--N11L1 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~128 at LC_X15_Y7_N1
--operation mode is arithmetic

N11L1 = N17_sout_node[0] $ N14_sout_node[6];

--N8_sout_node[0] is lpm_add_sub2:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[0] at LC_X15_Y7_N1
--operation mode is arithmetic

N8_sout_node[0] = DFFEAS(N11L1, GLOBAL(D1_clka), VCC, , , , , , );

--N11L2 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~130 at LC_X15_Y7_N1
--operation mode is arithmetic

N11L2_cout_0 = N17_sout_node[0] & N14_sout_node[6];
N11L2 = CARRY(N11L2_cout_0);

--N11L3 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~130COUT1_159 at LC_X15_Y7_N1
--operation mode is arithmetic

N11L3_cout_1 = N17_sout_node[0] & N14_sout_node[6];
N11L3 = CARRY(N11L3_cout_1);


--N11L4 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~133 at LC_X15_Y7_N2
--operation mode is arithmetic

N11L4 = N17_sout_node[1] $ N11L2;

--N8_sout_node[1] is lpm_add_sub2:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[1] at LC_X15_Y7_N2
--operation mode is arithmetic

N8_sout_node[1] = DFFEAS(N11L4, GLOBAL(D1_clka), VCC, , , , , , );

--N11L5 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~135 at LC_X15_Y7_N2
--operation mode is arithmetic

N11L5_cout_0 = !N11L2 # !N17_sout_node[1];
N11L5 = CARRY(N11L5_cout_0);

--N11L6 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~135COUT1_160 at LC_X15_Y7_N2
--operation mode is arithmetic

N11L6_cout_1 = !N11L3 # !N17_sout_node[1];
N11L6 = CARRY(N11L6_cout_1);


--N11L7 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~138 at LC_X15_Y7_N3
--operation mode is arithmetic

N11L7 = N17_sout_node[2] $ (!N11L5);

--N8_sout_node[2] is lpm_add_sub2:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[2] at LC_X15_Y7_N3
--operation mode is arithmetic

N8_sout_node[2] = DFFEAS(N11L7, GLOBAL(D1_clka), VCC, , , , , , );

--N11L8 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~140 at LC_X15_Y7_N3
--operation mode is arithmetic

N11L8_cout_0 = N17_sout_node[2] & (!N11L5);
N11L8 = CARRY(N11L8_cout_0);

--N11L9 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~140COUT1 at LC_X15_Y7_N3
--operation mode is arithmetic

N11L9_cout_1 = N17_sout_node[2] & (!N11L6);
N11L9 = CARRY(N11L9_cout_1);


--N11L10 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~143 at LC_X15_Y7_N4
--operation mode is arithmetic

N11L10 = N17_sout_node[3] $ N11L8;

--N8_sout_node[3] is lpm_add_sub2:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[3] at LC_X15_Y7_N4
--operation mode is arithmetic

N8_sout_node[3] = DFFEAS(N11L10, GLOBAL(D1_clka), VCC, , , , , , );

--N11L11 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~145 at LC_X15_Y7_N4
--operation mode is arithmetic

N11L11 = N11L12;


--N11L14 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~148 at LC_X15_Y7_N5
--operation mode is arithmetic

N11L14_carry_eqn = (!N11L11 & GND) # (N11L11 & VCC);
N11L14 = N17_sout_node[4] $ !N11L14_carry_eqn;

--N8_sout_node[4] is lpm_add_sub2:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[4] at LC_X15_Y7_N5
--operation mode is arithmetic

N8_sout_node[4] = DFFEAS(N11L14, GLOBAL(D1_clka), VCC, , , , , , );

--N11L15 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~150 at LC_X15_Y7_N5
--operation mode is arithmetic

N11L15_cout_0 = N17_sout_node[4] & !N11L11;
N11L15 = CARRY(N11L15_cout_0);

--N11L16 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~150COUT1_161 at LC_X15_Y7_N5
--operation mode is arithmetic

N11L16_cout_1 = N17_sout_node[4] & !N11L11;
N11L16 = CARRY(N11L16_cout_1);


--N11L17 is lpm_add_sub2:inst3|lpm_add_sub:lpm_add_sub_component|addcore:adder1[1]|a_csnbuffer:result_node|cs_buffer[0]~153 at LC_X15_Y7_N6
--operation mode is normal

N11L17_carry_eqn = (!N11L11 & N11L15) # (N11L11 & N11L16);
N11L17 = N11L17_carry_eqn $ N17_sout_node[5];

--N8_sout_node[5] is lpm_add_sub2:inst4|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[5] at LC_X15_Y7_N6
--operation mode is normal

N8_sout_node[5] = DFFEAS(N11L17, GLOBAL(D1_clka), VCC, , , , , , );


--N32_sout_node[1] is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1] at LC_X16_Y6_N1
--operation mode is arithmetic

N32_sout_node[1]_lut_out = N32L10 $ N32_sout_node[1];
N32_sout_node[1] = DFFEAS(N32_sout_node[1]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N32L8 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1]~45 at LC_X16_Y6_N1
--operation mode is arithmetic

N32L8_cout_0 = N32L10 & N32_sout_node[1];
N32L8 = CARRY(N32L8_cout_0);

--N32L9 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[1]~45COUT1_72 at LC_X16_Y6_N1
--operation mode is arithmetic

N32L9_cout_1 = N32L10 & N32_sout_node[1];
N32L9 = CARRY(N32L9_cout_1);


--N32_sout_node[2] is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2] at LC_X16_Y6_N2
--operation mode is arithmetic

N32_sout_node[2]_lut_out = N32_sout_node[2] $ (N32L8);
N32_sout_node[2] = DFFEAS(N32_sout_node[2]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N32L12 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~49 at LC_X16_Y6_N2
--operation mode is arithmetic

N32L12_cout_0 = !N32L8 # !N32_sout_node[2];
N32L12 = CARRY(N32L12_cout_0);

--N32L13 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~49COUT1_73 at LC_X16_Y6_N2
--operation mode is arithmetic

N32L13_cout_1 = !N32L9 # !N32_sout_node[2];
N32L13 = CARRY(N32L13_cout_1);


--N32_sout_node[3] is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3] at LC_X16_Y6_N3
--operation mode is arithmetic

N32_sout_node[3]_lut_out = N32_sout_node[3] $ !N32L12;
N32_sout_node[3] = DFFEAS(N32_sout_node[3]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N32L15 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~53 at LC_X16_Y6_N3
--operation mode is arithmetic

N32L15_cout_0 = N32_sout_node[3] & !N32L12;
N32L15 = CARRY(N32L15_cout_0);

--N32L16 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~53COUT1 at LC_X16_Y6_N3
--operation mode is arithmetic

N32L16_cout_1 = N32_sout_node[3] & !N32L13;
N32L16 = CARRY(N32L16_cout_1);


--N32_sout_node[4] is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] at LC_X16_Y6_N4
--operation mode is arithmetic

N32_sout_node[4]_lut_out = N32_sout_node[4] $ N32L15;
N32_sout_node[4] = DFFEAS(N32_sout_node[4]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N32L18 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4]~57 at LC_X16_Y6_N4
--operation mode is arithmetic

N32L18 = N32L19;


--N32_sout_node[5] is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5] at LC_X16_Y6_N5
--operation mode is arithmetic

N32_sout_node[5]_carry_eqn = (!N32L18 & GND) # (N32L18 & VCC);
N32_sout_node[5]_lut_out = N32_sout_node[5] $ !N32_sout_node[5]_carry_eqn;
N32_sout_node[5] = DFFEAS(N32_sout_node[5]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );

--N32L22 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]~61 at LC_X16_Y6_N5
--operation mode is arithmetic

N32L22_cout_0 = N32_sout_node[5] & !N32L18;
N32L22 = CARRY(N32L22_cout_0);

--N32L23 is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[5]~61COUT1_74 at LC_X16_Y6_N5
--operation mode is arithmetic

N32L23_cout_1 = N32_sout_node[5] & !N32L18;
N32L23 = CARRY(N32L23_cout_1);


--N32_sout_node[6] is lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[6] at LC_X16_Y6_N6
--operation mode is normal

N32_sout_node[6]_carry_eqn = (!N32L18 & N32L22) # (N32L18 & N32L23);
N32_sout_node[6]_lut_out = N32_sout_node[6]_carry_eqn;
N32_sout_node[6] = DFFEAS(N32_sout_node[6]_lut_out, GLOBAL(D1_clka), VCC, , , , , , );


--D1_cc[4] is fp:inst2|cc[4] at LC_X20_Y5_N8
--operation mode is normal

D1_cc[4]_lut_out = D1L1 & (!A1L21 # !D1L4);