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📄 dds.map.rpt

📁 用FPGA实现DDS,可变频,幅值由硬件完成
💻 RPT
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; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                                             ;
+------------------------+-------------+------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: lpm_add_sub2:inst5|lpm_add_sub:lpm_add_sub_component ;
+------------------------+-------------+------------------------------------------------------------+
; Parameter Name         ; Value       ; Type                                                       ;
+------------------------+-------------+------------------------------------------------------------+
; LPM_WIDTH              ; 12          ; Integer                                                    ;
; LPM_REPRESENTATION     ; SIGNED      ; Untyped                                                    ;
; LPM_DIRECTION          ; ADD         ; Untyped                                                    ;
; ONE_INPUT_IS_CONSTANT  ; NO          ; Untyped                                                    ;
; LPM_PIPELINE           ; 1           ; Integer                                                    ;
; MAXIMIZE_SPEED         ; 5           ; Untyped                                                    ;
; REGISTERED_AT_END      ; 0           ; Untyped                                                    ;
; OPTIMIZE_FOR_SPEED     ; 5           ; Untyped                                                    ;
; USE_CS_BUFFERS         ; 1           ; Untyped                                                    ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                                                    ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                                         ;
; DEVICE_FAMILY          ; Cyclone     ; Untyped                                                    ;
; USE_WYS                ; OFF         ; Untyped                                                    ;
; STYLE                  ; FAST        ; Untyped                                                    ;
; CBXI_PARAMETER         ; add_sub_4fg ; Untyped                                                    ;
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                                                 ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                                               ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                                               ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                                             ;
+------------------------+-------------+------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: bianma1:inst1|altsyncram:Mux_rtl_0 ;
+------------------------------------+----------------+-------------------------------+
; Parameter Name                     ; Value          ; Type                          ;
+------------------------------------+----------------+-------------------------------+
; BYTE_SIZE_BLOCK                    ; 8              ; Untyped                       ;
; AUTO_CARRY_CHAINS                  ; ON             ; AUTO_CARRY                    ;
; IGNORE_CARRY_BUFFERS               ; OFF            ; IGNORE_CARRY                  ;
; AUTO_CASCADE_CHAINS                ; ON             ; AUTO_CASCADE                  ;
; IGNORE_CASCADE_BUFFERS             ; OFF            ; IGNORE_CASCADE                ;
; OPERATION_MODE                     ; ROM            ; Untyped                       ;
; WIDTH_A                            ; 8              ; Untyped                       ;
; WIDTHAD_A                          ; 8              ; Untyped                       ;
; NUMWORDS_A                         ; 256            ; Untyped                       ;
; OUTDATA_REG_A                      ; UNREGISTERED   ; Untyped                       ;
; ADDRESS_ACLR_A                     ; NONE           ; Untyped                       ;
; OUTDATA_ACLR_A                     ; NONE           ; Untyped                       ;
; WRCONTROL_ACLR_A                   ; NONE           ; Untyped                       ;
; INDATA_ACLR_A                      ; NONE           ; Untyped                       ;
; BYTEENA_ACLR_A                     ; NONE           ; Untyped                       ;
; WIDTH_B                            ; 1              ; Untyped                       ;
; WIDTHAD_B                          ; 1              ; Untyped                       ;
; NUMWORDS_B                         ; 1              ; Untyped                       ;
; INDATA_REG_B                       ; CLOCK1         ; Untyped                       ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1         ; Untyped                       ;
; RDCONTROL_REG_B                    ; CLOCK1         ; Untyped                       ;
; ADDRESS_REG_B                      ; CLOCK1         ; Untyped                       ;
; OUTDATA_REG_B                      ; UNREGISTERED   ; Untyped                       ;
; BYTEENA_REG_B                      ; CLOCK1         ; Untyped                       ;
; INDATA_ACLR_B                      ; NONE           ; Untyped                       ;
; WRCONTROL_ACLR_B                   ; NONE           ; Untyped                       ;
; ADDRESS_ACLR_B                     ; NONE           ; Untyped                       ;
; OUTDATA_ACLR_B                     ; NONE           ; Untyped                       ;
; RDCONTROL_ACLR_B                   ; NONE           ; Untyped                       ;
; BYTEENA_ACLR_B                     ; NONE           ; Untyped                       ;
; WIDTH_BYTEENA_A                    ; 1              ; Untyped                       ;
; WIDTH_BYTEENA_B                    ; 1              ; Untyped                       ;
; RAM_BLOCK_TYPE                     ; AUTO           ; Untyped                       ;
; BYTE_SIZE                          ; 8              ; Untyped                       ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE      ; Untyped                       ;
; INIT_FILE                          ; dds0.rtl.mif   ; Untyped                       ;
; INIT_FILE_LAYOUT                   ; PORT_A         ; Untyped                       ;
; MAXIMUM_DEPTH                      ; 0              ; Untyped                       ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL         ; Untyped                       ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL         ; Untyped                       ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL         ; Untyped                       ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL         ; Untyped                       ;
; DEVICE_FAMILY                      ; Cyclone        ; Untyped                       ;
; CBXI_PARAMETER                     ; altsyncram_btk ; Untyped                       ;
+------------------------------------+----------------+-------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in C:/Documents and Settings/ryu/桌面/新建文件夹/dds/dds.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
    Info: Processing started: Mon Jul 30 13:12:30 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off dds -c dds
Info: Found 2 design units, including 1 entities, in source file bianma1.vhd
    Info: Found design unit 1: bianma1-aaa
    Info: Found entity 1: bianma1
Info: Found 1 design units, including 1 entities, in source file dds.bdf
    Info: Found entity 1: dds
Info: Found 2 design units, including 1 entities, in source file ../fp/Vhdl1.vhd
    Info: Found design unit 1: fp-a
    Info: Found entity 1: fp
Info: Elaborating entity "dds" for the top level hierarchy
Warning: Found multiple base names
Warning: Found multiple base names
Warning: Using design file lpm_rom1.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: lpm_rom1-SYN
    Info: Found entity 1: lpm_rom1
Info: Elaborating entity "lpm_rom1" for hierarchy "lpm_rom1:inst"
Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus51/libraries/megafunctions/altsyncram.tdf
    Info: Found entit

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