_primary.vhd

this come from alter ,you can look and find it on line about h263.

library verilog;
use verilog.vl_types.all;
entity burstfifo is
    generic(
        width           : integer := 8;
        addrwidth       : integer := 10
    );
    port(
        clk_i           : in     vl_logic;
        async_rst_i     : in     vl_logic;
        ena_i           : in     vl_logic;
        readstart_i     : in     vl_logic;
        burstsize_i     : in     vl_logic_vector;
        write_i         : in     vl_logic;
        datain_i        : in     vl_logic_vector;
        notempty_o      : out    vl_logic;
        notfull_o       : out    vl_logic;
        dataout_o       : out    vl_logic_vector;
        validout_o      : out    vl_logic;
        maxfill_o       : out    vl_logic_vector
    );
end burstfifo;