📄 _primary.vhd
字号:
library verilog;use verilog.vl_types.all;entity metrics is port( rst_i : in vl_logic; clk_i : in vl_logic; ena_i : in vl_logic; valid_i : in vl_logic; indec_i : in vl_logic_vector(1 downto 0); count_i : in vl_logic_vector(1 downto 0); endblock_i : in vl_logic; brdec_o : out vl_logic_vector(63 downto 0); opathdone_o : out vl_logic; outofsync_o : out vl_logic; ind_o : out vl_logic_vector(5 downto 0) );end metrics;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -