decode.vhd

初学ＶＨＤＬ有用的

--七段数码显示---
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
--***************************
ENTITY decode IS
  		PORT(adr: IN	std_logic_vector(3 downto 0);
				dout: OUT	std_logic_vector(6 downto 0));
END decode;
--*************************
ARCHITECTURE tru OF decode IS
      BEGIN
     process(adr)   
     begin
        case adr is
       when "0000"=>dout<="0111111";
       when "0001"=>dout<="0000110";
       when "0010"=>dout<="1011011";
       when "0011"=>dout<="1001111";
       when "0100"=>dout<="1100110";
       when "0101"=>dout<="1101101";
       when "0110"=>dout<="1111101";
       when "0111"=>dout<="0000111";
       when others=>dout<="0000000";
      end case;
        end process;
end tru;