dds.tan.qmsg

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{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "23 " "Warning: Found 23 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[0\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[0\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[0\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUTCOUT1_1 " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUTCOUT1_1\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 39 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUTCOUT1_1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[1\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[1\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[1\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUTCOUT1_1 " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUTCOUT1_1\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 47 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUTCOUT1_1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUT " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUT\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 39 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUT" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[2\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[2\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[2\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUT " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUT\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 47 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUT" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[3\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[3\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[3\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[5\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[5\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[5\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[6\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[6\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[6\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella6~COUTCOUT1_1 " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella6~COUTCOUT1_1\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 79 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella6~COUTCOUT1_1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella6~COUT " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella6~COUT\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 79 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella6~COUT" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUTCOUT1 " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUTCOUT1\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 55 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUTCOUT1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUT " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUT\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 55 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUT" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[4\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[4\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[4\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[7\] " "Info: Detected ripple clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[7\]\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[7\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella7~COUTCOUT1_1 " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella7~COUTCOUT1_1\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 87 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella7~COUTCOUT1_1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella7~COUT " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella7~COUT\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 87 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella7~COUT" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella4~COUT " "Info: Detected gated clock \"ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella4~COUT\" as buffer" {  } { { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 63 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella4~COUT" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[0\] " "Info: Detected ripple clock \"M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[0\]\" as buffer" {  } { { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 59 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[0\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[1\] " "Info: Detected ripple clock \"M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[1\]\" as buffer" {  } { { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 59 8 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[1\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUTCOUT1_1 " "Info: Detected gated clock \"M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUTCOUT1_1\" as buffer" {  } { { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 39 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUTCOUT1_1" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUT " "Info: Detected gated clock \"M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUT\" as buffer" {  } { { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 39 2 0 } } { "d:/program files/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/program files/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUT" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "fpgaclk register AddrCt:inst5\|lpm_counter:lpm_counter_component\|cntr_adh:auto_generated\|safe_q\[5\] register PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[4\] 64.95 MHz 15.397 ns Internal " "Info: Clock \"fpgaclk\" has Internal fmax of 64.95 MHz between source register \"AddrCt:inst5\|lpm_counter:lpm_counter_component\|cntr_adh:auto_generated\|safe_q\[5\]\" and destination register \"PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[4\]\" (period= 15.397 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "14.166 ns + Longest register register " "Info: + Longest register to register delay is 14.166 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns AddrCt:inst5\|lpm_counter:lpm_counter_component\|cntr_adh:auto_generated\|safe_q\[5\] 1 REG LC_X15_Y11_N5 254 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X15_Y11_N5; Fanout = 254; REG Node = 'AddrCt:inst5\|lpm_counter:lpm_counter_component\|cntr_adh:auto_generated\|safe_q\[5\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } "NODE_NAME" } } { "db/cntr_adh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_adh.tdf" 98 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.978 ns) + CELL(0.442 ns) 3.420 ns RAM256:inst3\|Mem__dual~67599 2 COMB LC_X29_Y7_N0 1 " "Info: 2: + IC(2.978 ns) + CELL(0.442 ns) = 3.420 ns; Loc. = LC_X29_Y7_N0; Fanout = 1; COMB Node = 'RAM256:inst3\|Mem__dual~67599'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.420 ns" { AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] RAM256:inst3|Mem__dual~67599 } "NODE_NAME" } } { "RAM256.v" "" { Text "D:/zx/quartus_project/dds/DDS/RAM256.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.149 ns) + CELL(0.114 ns) 4.683 ns RAM256:inst3\|Mem__dual~67600 3 COMB LC_X28_Y9_N0 1 " "Info: 3: + IC(1.149 ns) + CELL(0.114 ns) = 4.683 ns; Loc. = LC_X28_Y9_N0; Fanout = 1; COMB Node = 'RAM256:inst3\|Mem__dual~67600'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.263 ns" { RAM256:inst3|Mem__dual~67599 RAM256:inst3|Mem__dual~67600 } "NODE_NAME" } } { "RAM256.v" "" { Text "D:/zx/quartus_project/dds/DDS/RAM256.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.901 ns) + CELL(0.114 ns) 6.698 ns RAM256:inst3\|Mem__dual~67601 4 COMB LC_X20_Y11_N4 1 " "Info: 4: + IC(1.901 ns) + CELL(0.114 ns) = 6.698 ns; Loc. = LC_X20_Y11_N4; Fanout = 1; COMB Node = 'RAM256:inst3\|Mem__dual~67601'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.015 ns" { RAM256:inst3|Mem__dual~67600 RAM256:inst3|Mem__dual~67601 } "NODE_NAME" } } { "RAM256.v" "" { Text "D:/zx/quartus_project/dds/DDS/RAM256.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.934 ns) + CELL(0.114 ns) 8.746 ns RAM256:inst3\|Mem__dual~67604 5 COMB LC_X26_Y10_N2 1 " "Info: 5: + IC(1.934 ns) + CELL(0.114 ns) = 8.746 ns; Loc. = LC_X26_Y10_N2; Fanout = 1; COMB Node = 'RAM256:inst3\|Mem__dual~67604'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.048 ns" { RAM256:inst3|Mem__dual~67601 RAM256:inst3|Mem__dual~67604 } "NODE_NAME" } } { "RAM256.v" "" { Text "D:/zx/quartus_project/dds/DDS/RAM256.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.267 ns) + CELL(0.292 ns) 10.305 ns RAM256:inst3\|Mem__dual~67605 6 COMB LC_X26_Y13_N2 1 " "Info: 6: + IC(1.267 ns) + CELL(0.292 ns) = 10.305 ns; Loc. = LC_X26_Y13_N2; Fanout = 1; COMB Node = 'RAM256:inst3\|Mem__dual~67605'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.559 ns" { RAM256:inst3|Mem__dual~67604 RAM256:inst3|Mem__dual~67605 } "NODE_NAME" } } { "RAM256.v" "" { Text "D:/zx/quartus_project/dds/DDS/RAM256.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.610 ns) + CELL(0.114 ns) 12.029 ns RAM256:inst3\|Mem__dual~67733 7 COMB LC_X21_Y10_N4 3 " "Info: 7: + IC(1.610 ns) + CELL(0.114 ns) = 12.029 ns; Loc. = LC_X21_Y10_N4; Fanout = 3; COMB Node = 'RAM256:inst3\|Mem__dual~67733'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.724 ns" { RAM256:inst3|Mem__dual~67605 RAM256:inst3|Mem__dual~67733 } "NODE_NAME" } } { "RAM256.v" "" { Text "D:/zx/quartus_project/dds/DDS/RAM256.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.697 ns) + CELL(0.423 ns) 13.149 ns PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[2\]~30 8 COMB LC_X20_Y10_N3 2 " "Info: 8: + IC(0.697 ns) + CELL(0.423 ns) = 13.149 ns; Loc. = LC_X20_Y10_N3; Fanout = 2; COMB Node = 'PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[2\]~30'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.120 ns" { RAM256:inst3|Mem__dual~67733 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~30 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 34 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 13.327 ns PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[3\]~31 9 COMB LC_X20_Y10_N4 3 " "Info: 9: + IC(0.000 ns) + CELL(0.178 ns) = 13.327 ns; Loc. = LC_X20_Y10_N4; Fanout = 3; COMB Node = 'PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[3\]~31'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.178 ns" { PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~30 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~31 } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 34 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.839 ns) 14.166 ns PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[4\] 10 REG LC_X20_Y10_N5 11 " "Info: 10: + IC(0.000 ns) + CELL(0.839 ns) = 14.166 ns; Loc. = LC_X20_Y10_N5; Fanout = 11; REG Node = 'PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[4\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.839 ns" { PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~31 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 34 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.630 ns ( 18.57 % ) " "Info: Total cell delay = 2.630 ns ( 18.57 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.536 ns ( 81.43 % ) " "Info: Total interconnect delay = 11.536 ns ( 81.43 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "14.166 ns" { AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] RAM256:inst3|Mem__dual~67599 RAM256:inst3|Mem__dual~67600 RAM256:inst3|Mem__dual~67601 RAM256:inst3|Mem__dual~67604 RAM256:inst3|Mem__dual~67605 RAM256:inst3|Mem__dual~67733 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~30 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~31 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "14.166 ns" { AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] RAM256:inst3|Mem__dual~67599 RAM256:inst3|Mem__dual~67600 RAM256:inst3|Mem__dual~67601 RAM256:inst3|Mem__dual~67604 RAM256:inst3|Mem__dual~67605 RAM256:inst3|Mem__dual~67733 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~30 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~31 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } { 0.000ns 2.978ns 1.149ns 1.901ns 1.934ns 1.267ns 1.610ns 0.697ns 0.000ns 0.000ns } { 0.000ns 0.442ns 0.114ns 0.114ns 0.114ns 0.292ns 0.114ns 0.423ns 0.178ns 0.839ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.970 ns - Smallest " "Info: - Smallest clock skew is -0.970 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "fpgaclk destination 8.942 ns + Shortest register " "Info: + Shortest clock path from clock \"fpgaclk\" to destination register is 8.942 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns fpgaclk 1 CLK PIN_29 11 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 11; CLK Node = 'fpgaclk'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { fpgaclk } "NODE_NAME" } } { "DDS.bdf" "" { Schematic "D:/zx/quartus_project/dds/DDS/DDS.bdf" { { 400 88 256 416 "fpgaclk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.745 ns) + CELL(0.935 ns) 3.149 ns M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[0\] 2 REG LC_X8_Y10_N5 3 " "Info: 2: + IC(0.745 ns) + CELL(0.935 ns) = 3.149 ns; Loc. = LC_X8_Y10_N5; Fanout = 3; REG Node = 'M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|safe_q\[0\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.680 ns" { fpgaclk M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] } "NODE_NAME" } } { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 59 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.496 ns) + CELL(0.423 ns) 4.068 ns M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella0~COUT 3 COMB LC_X8_Y10_N5 2 " "Info: 3: + IC(0.496 ns) + CELL(0.423 ns) = 4.068 ns; Loc. = LC_X8_Y10_N5; Fanout = 2; COMB Node = 'M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella0~COUT'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.919 ns" { M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT } "NODE_NAME" } } { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 32 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 4.146 ns M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUT 4 COMB LC_X8_Y10_N6 1 " "Info: 4: + IC(0.000 ns) + CELL(0.078 ns) = 4.146 ns; Loc. = LC_X8_Y10_N6; Fanout = 1; COMB Node = 'M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|counter_cella1~COUT'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.078 ns" { M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT } "NODE_NAME" } } { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 39 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.604 ns) 4.750 ns M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|cout 5 COMB LC_X8_Y10_N7 109 " "Info: 5: + IC(0.000 ns) + CELL(0.604 ns) = 4.750 ns; Loc. = LC_X8_Y10_N7; Fanout = 109; COMB Node = 'M2:inst10\|lpm_counter:lpm_counter_component\|cntr_vrh:auto_generated\|cout'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.604 ns" { M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout } "NODE_NAME" } } { "db/cntr_vrh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_vrh.tdf" 82 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.481 ns) + CELL(0.711 ns) 8.942 ns PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[4\] 6 REG LC_X20_Y10_N5 11 " "Info: 6: + IC(3.481 ns) + CELL(0.711 ns) = 8.942 ns; Loc. = LC_X20_Y10_N5; Fanout = 11; REG Node = 'PhaseAdd:inst1\|lpm_add_sub:lpm_add_sub_component\|addcore:adder1\[0\]\|a_csnbuffer:result_node\|sout_node\[4\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.192 ns" { M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } "NODE_NAME" } } { "a_csnbuffer.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 34 13 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.220 ns ( 47.19 % ) " "Info: Total cell delay = 4.220 ns ( 47.19 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.722 ns ( 52.81 % ) " "Info: Total interconnect delay = 4.722 ns ( 52.81 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.942 ns" { fpgaclk M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "8.942 ns" { fpgaclk fpgaclk~out0 M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } { 0.000ns 0.000ns 0.745ns 0.496ns 0.000ns 0.000ns 3.481ns } { 0.000ns 1.469ns 0.935ns 0.423ns 0.078ns 0.604ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "fpgaclk source 9.912 ns - Longest register " "Info: - Longest clock path from clock \"fpgaclk\" to source register is 9.912 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns fpgaclk 1 CLK PIN_29 11 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 11; CLK Node = 'fpgaclk'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { fpgaclk } "NODE_NAME" } } { "DDS.bdf" "" { Schematic "D:/zx/quartus_project/dds/DDS/DDS.bdf" { { 400 88 256 416 "fpgaclk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.774 ns) + CELL(0.935 ns) 3.178 ns ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[1\] 2 REG LC_X7_Y13_N1 3 " "Info: 2: + IC(0.774 ns) + CELL(0.935 ns) = 3.178 ns; Loc. = LC_X7_Y13_N1; Fanout = 3; REG Node = 'ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|safe_q\[1\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.709 ns" { fpgaclk ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] } "NODE_NAME" } } { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 107 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.529 ns) + CELL(0.564 ns) 4.271 ns ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUT 3 COMB LC_X7_Y13_N1 2 " "Info: 3: + IC(0.529 ns) + CELL(0.564 ns) = 4.271 ns; Loc. = LC_X7_Y13_N1; Fanout = 2; COMB Node = 'ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella1~COUT'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.093 ns" { ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT } "NODE_NAME" } } { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 39 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 4.349 ns ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUT 4 COMB LC_X7_Y13_N2 2 " "Info: 4: + IC(0.000 ns) + CELL(0.078 ns) = 4.349 ns; Loc. = LC_X7_Y13_N2; Fanout = 2; COMB Node = 'ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella2~COUT'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.078 ns" { ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT } "NODE_NAME" } } { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 47 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.078 ns) 4.427 ns ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUT 5 COMB LC_X7_Y13_N3 2 " "Info: 5: + IC(0.000 ns) + CELL(0.078 ns) = 4.427 ns; Loc. = LC_X7_Y13_N3; Fanout = 2; COMB Node = 'ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella3~COUT'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.078 ns" { ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT } "NODE_NAME" } } { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 55 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.178 ns) 4.605 ns ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella4~COUT 6 COMB LC_X7_Y13_N4 4 " "Info: 6: + IC(0.000 ns) + CELL(0.178 ns) = 4.605 ns; Loc. = LC_X7_Y13_N4; Fanout = 4; COMB Node = 'ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|counter_cella4~COUT'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.178 ns" { ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT } "NODE_NAME" } } { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 63 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.621 ns) 5.226 ns ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|cout 7 COMB LC_X7_Y13_N8 8 " "Info: 7: + IC(0.000 ns) + CELL(0.621 ns) = 5.226 ns; Loc. = LC_X7_Y13_N8; Fanout = 8; COMB Node = 'ReadCt:inst4\|lpm_counter:lpm_counter_component\|cntr_5sh:auto_generated\|cout'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.621 ns" { ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout } "NODE_NAME" } } { "db/cntr_5sh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_5sh.tdf" 136 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.975 ns) + CELL(0.711 ns) 9.912 ns AddrCt:inst5\|lpm_counter:lpm_counter_component\|cntr_adh:auto_generated\|safe_q\[5\] 8 REG LC_X15_Y11_N5 254 " "Info: 8: + IC(3.975 ns) + CELL(0.711 ns) = 9.912 ns; Loc. = LC_X15_Y11_N5; Fanout = 254; REG Node = 'AddrCt:inst5\|lpm_counter:lpm_counter_component\|cntr_adh:auto_generated\|safe_q\[5\]'" {  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "4.686 ns" { ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } "NODE_NAME" } } { "db/cntr_adh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_adh.tdf" 98 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.634 ns ( 46.75 % ) " "Info: Total cell delay = 4.634 ns ( 46.75 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.278 ns ( 53.25 % ) " "Info: Total interconnect delay = 5.278 ns ( 53.25 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.912 ns" { fpgaclk ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "9.912 ns" { fpgaclk fpgaclk~out0 ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } { 0.000ns 0.000ns 0.774ns 0.529ns 0.000ns 0.000ns 0.000ns 0.000ns 3.975ns } { 0.000ns 1.469ns 0.935ns 0.564ns 0.078ns 0.078ns 0.178ns 0.621ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.942 ns" { fpgaclk M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "8.942 ns" { fpgaclk fpgaclk~out0 M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } { 0.000ns 0.000ns 0.745ns 0.496ns 0.000ns 0.000ns 3.481ns } { 0.000ns 1.469ns 0.935ns 0.423ns 0.078ns 0.604ns 0.711ns } } } { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.912 ns" { fpgaclk ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "9.912 ns" { fpgaclk fpgaclk~out0 ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } { 0.000ns 0.000ns 0.774ns 0.529ns 0.000ns 0.000ns 0.000ns 0.000ns 3.975ns } { 0.000ns 1.469ns 0.935ns 0.564ns 0.078ns 0.078ns 0.178ns 0.621ns 0.711ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "db/cntr_adh.tdf" "" { Text "D:/zx/quartus_project/dds/DDS/db/cntr_adh.tdf" 98 8 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "a_csnbuffer.tdf" "" { Text "d:/program files/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf" 34 13 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "14.166 ns" { AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] RAM256:inst3|Mem__dual~67599 RAM256:inst3|Mem__dual~67600 RAM256:inst3|Mem__dual~67601 RAM256:inst3|Mem__dual~67604 RAM256:inst3|Mem__dual~67605 RAM256:inst3|Mem__dual~67733 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~30 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~31 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "14.166 ns" { AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] RAM256:inst3|Mem__dual~67599 RAM256:inst3|Mem__dual~67600 RAM256:inst3|Mem__dual~67601 RAM256:inst3|Mem__dual~67604 RAM256:inst3|Mem__dual~67605 RAM256:inst3|Mem__dual~67733 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[2]~30 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[3]~31 PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } { 0.000ns 2.978ns 1.149ns 1.901ns 1.934ns 1.267ns 1.610ns 0.697ns 0.000ns 0.000ns } { 0.000ns 0.442ns 0.114ns 0.114ns 0.114ns 0.292ns 0.114ns 0.423ns 0.178ns 0.839ns } } } { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.942 ns" { fpgaclk M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "8.942 ns" { fpgaclk fpgaclk~out0 M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|safe_q[0] M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella0~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|counter_cella1~COUT M2:inst10|lpm_counter:lpm_counter_component|cntr_vrh:auto_generated|cout PhaseAdd:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1[0]|a_csnbuffer:result_node|sout_node[4] } { 0.000ns 0.000ns 0.745ns 0.496ns 0.000ns 0.000ns 3.481ns } { 0.000ns 1.469ns 0.935ns 0.423ns 0.078ns 0.604ns 0.711ns } } } { "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.912 ns" { fpgaclk ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } "NODE_NAME" } } { "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/altera/quartus60/win/Technology_Viewer.qrui" "9.912 ns" { fpgaclk fpgaclk~out0 ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|safe_q[1] ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella1~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella2~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella3~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|counter_cella4~COUT ReadCt:inst4|lpm_counter:lpm_counter_component|cntr_5sh:auto_generated|cout AddrCt:inst5|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] } { 0.000ns 0.000ns 0.774ns 0.529ns 0.000ns 0.000ns 0.000ns 0.000ns 3.975ns } { 0.000ns 1.469ns 0.935ns 0.564ns 0.078ns 0.078ns 0.178ns 0.621ns 0.711ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}