📄 guangshanchi.tan.qmsg
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{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node \"CLK\" is an undefined clock" { } { { "GuangShanChi.bdf" "" { Schematic "D:/altera/qdesigns50/GuangShanChi/GuangShanChi.bdf" { { 120 64 232 136 "CLK" "" } { 144 808 840 160 "CLK" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } } } 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "A " "Info: Assuming node \"A\" is an undefined clock" { } { { "GuangShanChi.bdf" "" { Schematic "D:/altera/qdesigns50/GuangShanChi/GuangShanChi.bdf" { { 104 64 232 120 "A" "" } } } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "A" } } } } } 0} } { } 0}
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