cutout.map.qmsg

光栅尺的四细分和辩向电路

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Jun 15 10:10:38 2007 " "Info: Processing started: Fri Jun 15 10:10:38 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off CutOut -c CutOut " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off CutOut -c CutOut" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "CntOut.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file CntOut.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 CntOut " "Info: Found entity 1: CntOut" {  } { { "CntOut.bdf" "" { Schematic "D:/altera/qdesigns50/GuangShanChi/CutOut/CntOut.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "CntOut " "Info: Elaborating entity \"CntOut\" for the top level hierarchy" {  } {  } 0}
{ "Warning" "WGDFX_SYMBOLS_OVERLAP_WARNING" "DFF inst3 " "Warning: Block or symbol \"DFF\" of instance \"inst3\" overlaps another block or symbol" {  } { { "CntOut.bdf" "" { Schematic "D:/altera/qdesigns50/GuangShanChi/CutOut/CntOut.bdf" { { 24 312 376 104 "inst3" "" } } } }  } 0}
{ "Warning" "WSGN_MEGAFN_REPLACE" "Mux D:/altera/qdesigns50/GuangShanChi/CutOut/Mux.vhd " "Warning: Entity \"Mux\" obtained from \"D:/altera/qdesigns50/GuangShanChi/CutOut/Mux.vhd\" instead of from Quartus II megafunction library" {  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "Mux.vhd 2 1 " "Info: Using design file Mux.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Mux-SYN " "Info: Found design unit 1: Mux-SYN" {  } { { "Mux.vhd" "" { Text "D:/altera/qdesigns50/GuangShanChi/CutOut/Mux.vhd" 52 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 Mux " "Info: Found entity 1: Mux" {  } { { "Mux.vhd" "" { Text "D:/altera/qdesigns50/GuangShanChi/CutOut/Mux.vhd" 39 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Mux Mux:inst5 " "Info: Elaborating entity \"Mux\" for hierarchy \"Mux:inst5\"" {  } { { "CntOut.bdf" "inst5" { Schematic "D:/altera/qdesigns50/GuangShanChi/CutOut/CntOut.bdf" { { 112 904 1040 224 "inst5" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../quartus50/libraries/megafunctions/lpm_mux.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../../quartus50/libraries/megafunctions/lpm_mux.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_mux " "Info: Found entity 1: lpm_mux" {  } { { "lpm_mux.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_mux.tdf" 72 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_mux Mux:inst5\|lpm_mux:lpm_mux_component " "Info: Elaborating entity \"lpm_mux\" for hierarchy \"Mux:inst5\|lpm_mux:lpm_mux_component\"" {  } { { "Mux.vhd" "lpm_mux_component" { Text "D:/altera/qdesigns50/GuangShanChi/CutOut/Mux.vhd" 118 -1 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../quartus50/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../../quartus50/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "altshift.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altshift.tdf" 28 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altshift Mux:inst5\|lpm_mux:lpm_mux_component\|altshift:external_latency_ffs " "Info: Elaborating entity \"altshift\" for hierarchy \"Mux:inst5\|lpm_mux:lpm_mux_component\|altshift:external_latency_ffs\"" {  } { { "lpm_mux.tdf" "external_latency_ffs" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_mux.tdf" 94 2 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../quartus50/libraries/megafunctions/muxlut.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../../quartus50/libraries/megafunctions/muxlut.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 muxlut " "Info: Found entity 1: muxlut" {  } { { "muxlut.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/muxlut.tdf" 70 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "muxlut Mux:inst5\|lpm_mux:lpm_mux_component\|muxlut:\$00009 " "Info: Elaborating entity \"muxlut\" for hierarchy \"Mux:inst5\|lpm_mux:lpm_mux_component\|muxlut:\$00009\"" {  } { { "lpm_mux.tdf" "\$00009" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_mux.tdf" 205 21 0 } }  } 0}
{ "Info" "ISGN_SEARCH_FILE" "lpm_counter24.vhd 2 1 " "Info: Using design file lpm_counter24.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lpm_counter24-SYN " "Info: Found design unit 1: lpm_counter24-SYN" {  } { { "lpm_counter24.vhd" "" { Text "D:/altera/qdesigns50/GuangShanChi/CutOut/lpm_counter24.vhd" 50 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter24 " "Info: Found entity 1: lpm_counter24" {  } { { "lpm_counter24.vhd" "" { Text "D:/altera/qdesigns50/GuangShanChi/CutOut/lpm_counter24.vhd" 39 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter24 lpm_counter24:inst " "Info: Elaborating entity \"lpm_counter24\" for hierarchy \"lpm_counter24:inst\"" {  } { { "CntOut.bdf" "inst" { Schematic "D:/altera/qdesigns50/GuangShanChi/CutOut/CntOut.bdf" { { 80 432 576 192 "inst" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../../quartus50/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../../quartus50/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter lpm_counter24:inst\|lpm_counter:lpm_counter_component " "Info: Elaborating entity \"lpm_counter\" for hierarchy \"lpm_counter24:inst\|lpm_counter:lpm_counter_component\"" {  } { { "lpm_counter24.vhd" "lpm_counter_component" { Text "D:/altera/qdesigns50/GuangShanChi/CutOut/lpm_counter24.vhd" 73 -1 0 } }  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "60 " "Info: Implemented 60 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "5 " "Info: Implemented 5 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "8 " "Info: Implemented 8 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_MCELLS" "47 " "Info: Implemented 47 macrocells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Jun 15 10:10:43 2007 " "Info: Processing ended: Fri Jun 15 10:10:43 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0}  } {  } 0}