frequent.sim

这是个用VHDL写的测频源程序,最大可测10M,你可以任意修改,但请你更新后发一份给我

 GLB_C1_P1.A1;
   NET  COUT4Z0Z_1_ffb  SRC GRP_COUT4Z0Z_1_ffb.Z0  DST GLB_C1_IN17.A0 GLB_C1_IN17B.A0;
   NET  COUT4Z0Z_3_grp  SRC GRP_COUT4Z0Z_3_grp.Z0  DST GLB_B3_IN5.A0 GLB_C1_IN10.A0 GLB_C1_IN10B.A0;
   NET  C1_P0  SRC GLB_C1_P0.Z0  DST GLB_C1_F0.A3;
   NET  C1_IN3  SRC GLB_C1_IN3.Z0  DST GLB_C1_P17.A4 GLB_C1_P10.A4 GLB_C1_P4.A3 GLB_C1_P1.A3 GLB_C1_P0.A3;
   NET  C1_IN10B  SRC GLB_C1_IN10B.ZN0  DST GLB_C1_P17.A3 GLB_C1_P0.A2;
   NET  C1_IN12  SRC GLB_C1_IN12.Z0  DST GLB_C1_P17.A2 GLB_C1_P10.A2 GLB_C1_P4.A2 GLB_C1_P1.A2 GLB_C1_P0.A1;
   NET  C1_IN17B  SRC GLB_C1_IN17B.ZN0  DST GLB_C1_P14.A0 GLB_C1_P10.A0 GLB_C1_P6.A0 GLB_C1_P1.A0 GLB_C1_P0.A0;
   NET  COUT3Z0Z_1  SRC GLB_COUT3Z0Z_1.Q0  DST GRP_COUT3Z0Z_1_grp.A0;
   NET  COUT3Z0Z_2  SRC GLB_COUT3Z0Z_2.Q0  DST GRP_COUT3Z0Z_2_grp.A0;
   NET  COUT3Z0Z_3  SRC GLB_COUT3Z0Z_3.Q0  DST GRP_COUT3Z0Z_3_ffb.A0 GRP_COUT3Z0Z_3_grp.A0;
   NET  MZ0Z3  SRC GLB_MZ0Z3.Q0  DST GRP_MZ0Z3_ffb.A0 GRP_MZ0Z3_grp.A0;
   NET  VCC  DST GLB_A1_P8.A0 GLB_A5_X0O.A1 GLB_A7_X0O.A1 GLB_C0_P13.A0 GLB_C1_X0O.A1
 GLB_C2_X0O.A1;
   NET  C2_CD  SRC GLB_C2_CD.Z0  DST GLB_COUT3Z0Z_1.CD GLB_COUT3Z0Z_2.CD GLB_COUT3Z0Z_3.CD GLB_MZ0Z3.CD;
   NET  C2_CLK  SRC GLB_C2_CLK.ZN0  DST GLB_COUT3Z0Z_1.CLK GLB_COUT3Z0Z_2.CLK GLB_COUT3Z0Z_3.CLK GLB_MZ0Z3.CLK;
   NET  C2_CLKP  SRC GLB_C2_CLKP.Z0  DST GLB_C2_CLK.A0;
   NET  C2_X1O  SRC GLB_C2_X1O.Z0  DST GLB_COUT3Z0Z_3.D0;
   NET  C2_X0O  SRC GLB_C2_X0O.Z0  DST GLB_MZ0Z3.D0;
   NET  C2_G3  SRC GLB_C2_G3.Z0  DST GLB_C2_X0O.A0;
   NET  C2_G2  SRC GLB_C2_G2.Z0  DST GLB_C2_X1O.A0;
   NET  C2_F5  SRC GLB_C2_F5.Z0  DST GLB_C2_G2.A0;
   NET  C2_F4  SRC GLB_C2_F4.Z0  DST GLB_C2_G3.A0;
   NET  C2_F1  SRC GLB_C2_F1.Z0  DST GLB_COUT3Z0Z_2.D0;
   NET  C2_F0  SRC GLB_C2_F0.Z0  DST GLB_COUT3Z0Z_1.D0;
   NET  C2_P19  SRC GLB_C2_P19.Z0  DST GLB_C2_CD.A0;
   NET  C2_IN4  SRC GLB_C2_IN4.Z0  DST GLB_C2_P19.A3;
   NET  C2_IN5  SRC GLB_C2_IN5.Z0  DST GLB_C2_P19.A2;
   NET  C2_IN13  SRC GLB_C2_IN13.Z0  DST GLB_C2_P19.A0;
   NET  C2_P17  SRC GLB_C2_P17.Z0  DST GLB_C2_F5.A0;
   NET  C2_P16  SRC GLB_C2_P16.Z0  DST GLB_C2_F5.A1;
   NET  C2_P15  SRC GLB_C2_P15.Z0  DST GLB_C2_F5.A2;
   NET  C2_P14  SRC GLB_C2_P14.Z0  DST GLB_C2_F5.A3;
   NET  C2_P13  SRC GLB_C2_P13.Z0  DST GLB_C2_F5.A4;
   NET  C2_P12  SRC GLB_C2_P12.Z0  DST GLB_C2_CLKP.A0;
   NET  C2_IN0  SRC GLB_C2_IN0.Z0  DST GLB_C2_P12.A0;
   NET  MZ0Z3_ffb  SRC GRP_MZ0Z3_ffb.Z0  DST GLB_C2_IN16B.A0;
   NET  C2_P11  SRC GLB_C2_P11.Z0  DST GLB_C2_F4.A0;
   NET  C2_IN16B  SRC GLB_C2_IN16B.ZN0  DST GLB_C2_P11.A0;
   NET  C2_P10  SRC GLB_C2_P10.Z0  DST GLB_C2_F4.A1;
   NET  C2_IN17  SRC GLB_C2_IN17.Z0  DST GLB_C2_P16.A0 GLB_C2_P15.A0 GLB_C2_P14.A0 GLB_C2_P13.A0 GLB_C2_P10.A0;
   NET  C2_P7  SRC GLB_C2_P7.Z0  DST GLB_C2_F1.A0;
   NET  C2_P6  SRC GLB_C2_P6.Z0  DST GLB_C2_F1.A1;
   NET  C2_P5  SRC GLB_C2_P5.Z0  DST GLB_C2_F1.A2;
   NET  C2_P4  SRC GLB_C2_P4.Z0  DST GLB_C2_F1.A3;
   NET  C2_IN14B  SRC GLB_C2_IN14B.ZN0  DST GLB_C2_P13.A2 GLB_C2_P10.A2 GLB_C2_P4.A1;
   NET  C2_P3  SRC GLB_C2_P3.Z0  DST GLB_C2_F0.A0;
   NET  C2_IN11B  SRC GLB_C2_IN11B.ZN0  DST GLB_C2_P16.A1 GLB_C2_P7.A1 GLB_C2_P3.A1;
   NET  C2_P2  SRC GLB_C2_P2.Z0  DST GLB_C2_F0.A1;
   NET  C2_IN12B  SRC GLB_C2_IN12B.ZN0  DST GLB_C2_P19.A1 GLB_C2_P15.A1 GLB_C2_P11.A1 GLB_C2_P5.A1 GLB_C2_P2.A1;
   NET  C2_IN15  SRC GLB_C2_IN15.Z0  DST GLB_C2_P17.A1 GLB_C2_P13.A1 GLB_C2_P4.A0 GLB_C2_P3.A0 GLB_C2_P2.A0;
   NET  C2_P1  SRC GLB_C2_P1.Z0  DST GLB_C2_F0.A2;
   NET  C2_IN14  SRC GLB_C2_IN14.Z0  DST GLB_C2_P17.A2 GLB_C2_P14.A2 GLB_C2_P7.A0 GLB_C2_P6.A1 GLB_C2_P5.A0
 GLB_C2_P1.A1;
   NET  COUT3Z0Z_3_ffb  SRC GRP_COUT3Z0Z_3_ffb.Z0  DST GLB_C2_IN17.A0 GLB_C2_IN17B.A0;
   NET  C2_P0  SRC GLB_C2_P0.Z0  DST GLB_C2_F0.A3;
   NET  C2_IN11  SRC GLB_C2_IN11.Z0  DST GLB_C2_P17.A4 GLB_C2_P10.A4 GLB_C2_P4.A3 GLB_C2_P1.A3 GLB_C2_P0.A3;
   NET  C2_IN12  SRC GLB_C2_IN12.Z0  DST GLB_C2_P17.A3 GLB_C2_P10.A3 GLB_C2_P4.A2 GLB_C2_P1.A2 GLB_C2_P0.A2;
   NET  C2_IN15B  SRC GLB_C2_IN15B.ZN0  DST GLB_C2_P14.A1 GLB_C2_P10.A1 GLB_C2_P6.A0 GLB_C2_P1.A0 GLB_C2_P0.A1;
   NET  C2_IN17B  SRC GLB_C2_IN17B.ZN0  DST GLB_C2_P17.A0 GLB_C2_P0.A0;
   NET  CHOICE_1_C_2  SRC GLB_CHOICE_1_C_2.Z0  DST GRP_CHOICE_1_C_2_grp.A0 GRP_CHOICE_1_C_2_iomux.A0;
   NET  CHOICE_1_C_1  SRC GLB_CHOICE_1_C_1.Z0  DST GRP_CHOICE_1_C_1_ffb.A0 GRP_CHOICE_1_C_1_iomux.A0;
   NET  CHOICE_1_C_0  SRC GLB_CHOICE_1_C_0.Z0  DST GRP_CHOICE_1_C_0_ffb.A0 GRP_CHOICE_1_C_0_iomux.A0;
   NET  CHOICE_1_C_5  SRC GLB_CHOICE_1_C_5.Z0  DST GRP_CHOICE_1_C_5_grp.A0 GRP_CHOICE_1_C_5_iomux.A0;
   NET  CHOICE_1_C_2_grp  SRC GRP_CHOICE_1_C_2_grp.Z0  DST GLB_C3_IN7.A0;
   NET  C3_P16  SRC GLB_C3_P16.Z0  DST GLB_CHOICE_1_C_2.A0;
   NET  C3_IN7  SRC GLB_C3_IN7.Z0  DST GLB_C3_P16.A1;
   NET  N_948_grp  SRC GRP_N_948_grp.Z0  DST GLB_A2_IN13B.A0 GLB_A3_IN6.A0 GLB_C3_IN9B.A0;
   NET  C3_P15  SRC GLB_C3_P15.Z0  DST GLB_CHOICE_1_C_2.A1;
   NET  C3_IN9B  SRC GLB_C3_IN9B.ZN0  DST GLB_C3_P16.A0 GLB_C3_P15.A0;
   NET  CHOICE_1_C_1_ffb  SRC GRP_CHOICE_1_C_1_ffb.Z0  DST GLB_C3_IN16.A0;
   NET  C3_P11  SRC GLB_C3_P11.Z0  DST GLB_CHOICE_1_C_1.A0;
   NET  C3_IN16  SRC GLB_C3_IN16.Z0  DST GLB_C3_P11.A0;
   NET  N_949_grp  SRC GRP_N_949_grp.Z0  DST GLB_A3_IN14.A0 GLB_C3_IN10B.A0;
   NET  C3_P10  SRC GLB_C3_P10.Z0  DST GLB_CHOICE_1_C_1.A1;
   NET  C3_IN10B  SRC GLB_C3_IN10B.ZN0  DST GLB_C3_P11.A1 GLB_C3_P10.A0;
   NET  CHOICE_1_C_0_ffb  SRC GRP_CHOICE_1_C_0_ffb.Z0  DST GLB_C3_IN17.A0;
   NET  C3_P7  SRC GLB_C3_P7.Z0  DST GLB_CHOICE_1_C_0.A0;
   NET  C3_IN17  SRC GLB_C3_IN17.Z0  DST GLB_C3_P7.A0;
   NET  N_952_grp  SRC GRP_N_952_grp.Z0  DST GLB_B5_IN14.A0 GLB_C3_IN5B.A0;
   NET  C3_P6  SRC GLB_C3_P6.Z0  DST GLB_CHOICE_1_C_0.A1;
   NET  C3_IN5B  SRC GLB_C3_IN5B.ZN0  DST GLB_C3_P7.A1 GLB_C3_P6.A0;
   NET  CHOICE_1_C_5_grp  SRC GRP_CHOICE_1_C_5_grp.Z0  DST GLB_C3_IN4.A0;
   NET  C3_P3  SRC GLB_C3_P3.Z0  DST GLB_CHOICE_1_C_5.A0;
   NET  C3_IN4  SRC GLB_C3_IN4.Z0  DST GLB_C3_P3.A0;
   NET  N_951_grp  SRC GRP_N_951_grp.Z0  DST GLB_B5_IN15.A0 GLB_C3_IN0B.A0;
   NET  C3_P2  SRC GLB_C3_P2.Z0  DST GLB_CHOICE_1_C_5.A1;
   NET  C3_IN0B  SRC GLB_C3_IN0B.ZN0  DST GLB_C3_P3.A1 GLB_C3_P2.A0;
   NET  COUNT2Z0Z_1  SRC GLB_COUNT2Z0Z_1.Q0  DST GRP_COUNT2Z0Z_1_grp.A0;
   NET  COUNT2Z0Z_2  SRC GLB_COUNT2Z0Z_2.Q0  DST GRP_COUNT2Z0Z_2_grp.A0;
   NET  COUNT2Z0Z_3  SRC GLB_COUNT2Z0Z_3.Q0  DST GRP_COUNT2Z0Z_3_ffb.A0 GRP_COUNT2Z0Z_3_grp.A0;
   NET  COUNT6Z0Z_0  SRC GLB_COUNT6Z0Z_0.Q0  DST GRP_COUNT6Z0Z_0_ffb.A0 GRP_COUNT6Z0Z_0_grp.A0;
   NET  C4_CLK  SRC GLB_C4_CLK.Z0  DST GLB_COUNT2Z0Z_1.CLK GLB_COUNT2Z0Z_2.CLK GLB_COUNT2Z0Z_3.CLK GLB_COUNT6Z0Z_0.CLK;
   NET  C4_P0_xa  SRC GLB_C4_P0_xa.Z0  DST GLB_C4_X3O.A1;
   NET  C4_X3O  SRC GLB_C4_X3O.Z0  DST GLB_COUNT2Z0Z_1.D0;
   NET  C4_P4_xa  SRC GLB_C4_P4_xa.Z0  DST GLB_C4_X2O.A1;
   NET  C4_X2O  SRC GLB_C4_X2O.Z0  DST GLB_COUNT2Z0Z_2.D0;
   NET  C4_P8_xa  SRC GLB_C4_P8_xa.Z0  DST GLB_C4_X1O.A1;
   NET  C4_X1O  SRC GLB_C4_X1O.Z0  DST GLB_COUNT2Z0Z_3.D0;
   NET  C4_P13_xa  SRC GLB_C4_P13_xa.Z0  DST GLB_C4_X0O.A1;
   NET  C4_X0O  SRC GLB_C4_X0O.Z0  DST GLB_COUNT6Z0Z_0.D0;
   NET  C4_G3  SRC GLB_C4_G3.Z0  DST GLB_C4_X0O.A0;
   NET  C4_G2  SRC GLB_C4_G2.Z0  DST GLB_C4_X1O.A0;
   NET  C4_G1  SRC GLB_C4_G1.Z0  DST GLB_C4_X2O.A0;
   NET  C4_G0  SRC GLB_C4_G0.Z0  DST GLB_C4_X3O.A0;
   NET  C4_F5  SRC GLB_C4_F5.Z0  DST GLB_C4_G0.A0;
   NET  C4_F4  SRC GLB_C4_F4.Z0  DST GLB_C4_G1.A0;
   NET  C4_F1  SRC GLB_C4_F1.Z0  DST GLB_C4_G2.A0;
   NET  C4_F0  SRC GLB_C4_F0.Z0  DST GLB_C4_G3.A0;
   NET  C4_P16  SRC GLB_C4_P16.Z0  DST GLB_C4_F5.A0;
   NET  C4_P15  SRC GLB_C4_P15.Z0  DST GLB_C4_F5.A1;
   NET  C4_IN12  SRC GLB_C4_IN12.Z0  DST GLB_C4_P15.A0;
   NET  COUT2Z0Z_1_grp  SRC GRP_COUT2Z0Z_1_grp.Z0  DST GLB_C4_IN8.A0;
   NET  C4_P14  SRC GLB_C4_P14.Z0  DST GLB_C4_F5.A2;
   NET  C4_IN8  SRC GLB_C4_IN8.Z0  DST GLB_C4_P14.A0;
   NET  C4_P13  SRC GLB_C4_P13.Z0  DST GLB_C4_P13_xa.A0;
   NET  C4_IN16B  SRC GLB_C4_IN16B.ZN0  DST GLB_C4_P13.A0;
   NET  C4_P12  SRC GLB_C4_P12.Z0  DST GLB_C4_F4.A0;
   NET  C4_P11  SRC GLB_C4_P11.Z0  DST GLB_C4_F4.A1;
   NET  C4_IN13  SRC GLB_C4_IN13.Z0  DST GLB_C4_P11.A0;
   NET  COUT2Z0Z_2_grp  SRC GRP_COUT2Z0Z_2_grp.Z0  DST GLB_A5_IN6B.A0 GLB_A5_IN6.A0 GLB_C4_IN9.A0;
   NET  C4_P10  SRC GLB_C4_P10.Z0  DST GLB_C4_F4.A2;
   NET  C4_IN9  SRC GLB_C4_IN9.Z0  DST GLB_C4_P10.A0;
   NET  C4_P8  SRC GLB_C4_P8.Z0  DST GLB_C4_P8_xa.A0;
   NET  C4_IN17B  SRC GLB_C4_IN17B.ZN0  DST GLB_C4_P8.A0;
   NET  C4_P7  SRC GLB_C4_P7.Z0  DST GLB_C4_F1.A0;
   NET  COUNT2Z0Z_3_ffb  SRC GRP_COUNT2Z0Z_3_ffb.Z0  DST GLB_C4_IN17B.A0 GLB_C4_IN17.A0;
   NET  C4_P6  SRC GLB_C4_P6.Z0  DST GLB_C4_F1.A1;
   NET  C4_IN17  SRC GLB_C4_IN17.Z0  DST GLB_C4_P6.A0;
   NET  COUT2Z0Z_3_grp  SRC GRP_COUT2Z0Z_3_grp.Z0  DST GLB_C4_IN10.A0;
   NET  C4_P5  SRC GLB_C4_P5.Z0  DST GLB_C4_F1.A2;
   NET  C4_IN10  SRC GLB_C4_IN10.Z0  DST GLB_C4_P5.A0;
   NET  COUNT2Z0Z_2_grp  SRC GRP_COUNT2Z0Z_2_grp.Z0  DST GLB_A3_IN2.A0 GLB_C4_IN13.A0 GLB_C4_IN13B.A0;
   NET  C4_P4  SRC GLB_C4_P4.Z0  DST GLB_C4_P4_xa.A0;
   NET  C4_IN13B  SRC GLB_C4_IN13B.ZN0  DST GLB_C4_P4.A2;
   NET  C4_P3  SRC GLB_C4_P3.Z0  DST GLB_C4_F0.A0;
   NET  COUNT6Z0Z_0_ffb  SRC GRP_COUNT6Z0Z_0_ffb.Z0  DST GLB_C4_IN16B.A0 GLB_C4_IN16.A0;
   NET  C4_P2  SRC GLB_C4_P2.Z0  DST GLB_C4_F0.A1;
   NET  C4_IN7  SRC GLB_C4_IN7.Z0  DST GLB_C4_P15.A1 GLB_C4_P11.A1 GLB_C4_P6.A1 GLB_C4_P2.A1;
   NET  C4_IN16  SRC GLB_C4_IN16.Z0  DST GLB_C4_P2.A0;
   NET  COUT6Z0Z_0_grp  SRC GRP_COUT6Z0Z_0_grp.Z0  DST GLB_B7_IN11B.A0 GLB_B7_IN11.A0 GLB_C4_IN4.A0;
   NET  C4_P1  SRC GLB_C4_P1.Z0  DST GLB_C4_F0.A2;
   NET  C4_IN4  SRC GLB_C4_IN4.Z0  DST GLB_C4_P1.A1;
   NET  COUNT2Z0Z_1_grp  SRC GRP_COUNT2Z0Z_1_grp.Z0  DST GLB_B4_IN3.A0 GLB_B4_IN3B.A0 GLB_C4_IN12.A0 GLB_C4_IN12B.A0;
   NET  C4_P0  SRC GLB_C4_P0.Z0  DST GLB_C4_P0_xa.A0;
   NET  C4_IN6  SRC GLB_C4_IN6.Z0  DST GLB_C4_P16.A3 GLB_C4_P13.A4 GLB_C4_P12.A3 GLB_C4_P8.A4 GLB_C4_P7.A3
 GLB_C4_P4.A4 GLB_C4_P3.A3 GLB_C4_P0.A4;
   NET  C4_IN7B  SRC GLB_C4_IN7B.ZN0  DST GLB_C4_P16.A2 GLB_C4_P14.A1 GLB_C4_P13.A3 GLB_C4_P12.A2 GLB_C4_P10.A1
 GLB_C4_P8.A3 GLB_C4_P7.A2 GLB_C4_P5.A1 GLB_C4_P4.A3 GLB_C4_P3.A2
 GLB_C4_P1.A0 GLB_C4_P0.A3;
   NET  C4_IN12B  SRC GLB_C4_IN12B.ZN0  DST GLB_C4_P0.A2;
   NET  C4_IN14  SRC GLB_C4_IN14.Z0  DST GLB_C4_P16.A1 GLB_C4_P13.A2 GLB_C4_P12.A1 GLB_C4_P8.A2 GLB_C4_P7.A1
 GLB_C4_P4.A1 GLB_C4_P3.A1 GLB_C4_P0.A1;
   NET  C4_IN15  SRC GLB_C4_IN15.Z0  DST GLB_C4_P16.A0 GLB_C4_P13.A1 GLB_C4_P12.A0 GLB_C4_P8.A1 GLB_C4_P7.A0
 GLB_C4_P4.A0 GLB_C4_P3.A0 GLB_C4_P0.A0;
   NET  COUT3Z0Z_0  SRC GLB_COUT3Z0Z_0.Q0  DST GRP_COUT3Z0Z_0_ffb.A0 GRP_COUT3Z0Z_0_grp.A0;
   NET  C5_CD  SRC GLB_C5_CD.Z0  DST GLB_COUT3Z0Z_0.CD;
   NET  C5_CLK  SRC GLB_C5_CLK.ZN0  DST GLB_COUT3Z0Z_0.CLK;
   NET  C5_CLKP  SRC GLB_C5_CLKP.Z0  DST GLB_C5_CLK.A0;
   NET  C5_F3  SRC GLB_C5_F3.Z0  DST GLB_COUT3Z0Z_0.D0;
   NET  C5_P19  SRC GLB_C5_P19.Z0  DST GLB_C5_CD.A0;
   NET  C5_IN13  SRC GLB_C5_IN13.Z0  DST GLB_C5_P19.A2;
   NET  C5_IN14  SRC GLB_C5_IN14.Z0  DST GLB_C5_P19.A1;
   NET  C5_IN15  SRC GLB_C5_IN15.Z0  DST GLB_C5_P19.A0;
   NET  C5_P16  SRC GLB_C5_P16.Z0  DST GLB_C5_F3.A0;
   NET  C5_IN12  SRC GLB_C5_IN12.Z0  DST GLB_C5_P16.A1;
   NET  C5_IN16B  SRC GLB_C5_IN16B.ZN0  DST GLB_C5_P16.A0;
   NET  COUT3Z0Z_0_ffb  SRC GRP_COUT3Z0Z_0_ffb.Z0  DST GLB_C5_IN16B.A0 GLB_C5_IN16.A0;
   NET  C5_P15  SRC GLB_C5_P15.Z0  DST GLB_C5_F3.A1;
   NET  C5_IN12B  SRC GLB_C5_IN12B.ZN0  DST GLB_C5_P19.A3 GLB_C5_P15.A1;
   NET  C5_IN16  SRC GLB_C5_IN16.Z0  DST GLB_C5_P15.A0;
   NET  MZ0Z2_grp  SRC GRP_MZ0Z2_grp.Z0  DST GLB_A5_IN4B.A0 GLB_C2_IN0.A0 GLB_C5_IN11.A0;
   NET  C5_P12  SRC GLB_C5_P12.Z0  DST GLB_C5_CLKP.A0;
   NET  C5_IN11  SRC GLB_C5_IN11.Z0  DST GLB_C5_P12.A0;
   NET  COUNT1Z0Z_2  SRC GLB_COUNT1Z0Z_2.Q0  DST GRP_COUNT1Z0Z_2_grp.A0;
   NET  COUNT1Z0Z_3  SRC GLB_COUNT1Z0Z_3.Q0  DST GRP_COUNT1Z0Z_3_grp.A0;
   NET  COUNT2Z0Z_0  SRC GLB_COUNT2Z0Z_0.Q0  DST GRP_COUNT2Z0Z_0_grp.A0 GRP_COUNT2Z0Z_0_ffb.A0;
   NET  COUNT6Z0Z_1  SRC GLB_COUNT6Z0Z_1.Q0  DST GRP_COUNT6Z0Z_1_ffb.A0 GRP_COUNT6Z0Z_1_grp.A0;
   NET  C6_CLK  SRC GLB_C6_CLK.Z0  DST GLB_COUNT1Z0Z_2.CLK GLB_COUNT1Z0Z_3.CLK GLB_COUNT2Z0Z_0.CLK GLB_COUNT6Z0Z_1.CLK;
   NET  C6_P0_xa  SRC GLB_C6_P0_xa.Z0  DST GLB_C6_X3O.A1;
   NET  C6_X3O  SRC GLB_C6_X3O.Z0  DST GLB_COUNT1Z0Z_2.D0;
   NET  C6_P4_xa  SRC GLB_C6_P4_xa.Z0  DST GLB_C6_X2O.A1;
   NET  C6_X2O  SRC GLB_C6_X2O.Z0  DST GLB_COUNT1Z0Z_3.D0;
   NET  C6_P8_xa  SRC GLB_C6_P8_xa.Z0  DST GLB_C6_X1O.A1;
   NET  C6_X1O  SRC GLB_C6_X1O.Z0  DST GLB_COUNT2Z0Z_0.D0;
   NET  C6_P13_xa  SRC GLB_C6_P13_xa.Z0  DST GLB_C6_X0O.A1;
   NET  C6_X0O  SRC GLB_C6_X0O.Z0  DST GLB_COUNT6Z0Z_1.D0;
   NET  C6_G3  SRC GLB_C6_G3.Z0  DST GLB_C6_X0O.A0;
   NET  C6_G2  SRC GLB_C6_G2.Z0  DST GLB_C6_X1O.A0;
   NET  C6_G1  SRC GLB_C6_G1.Z0  DST GLB_C6_X2O.A0;
   NET  C6_G0  SRC GLB_C6_G0.Z0  DST GLB_C6_X3O.A0;
   NET  C6_F5  SRC GLB_C6_F5.Z0  DST GLB_C6_G0.A0;
   NET  C6_F4  SRC GLB_C6_F4.Z0  DST GLB_C6_G1.A0;
   NET  C6_F1  SRC GLB_C6_F1.Z0  DST GLB_C6_G2.A0;
   NET  C6_F0  SRC GLB_C6_F0.Z0  DST GLB_C6_G3.A0;
   NET  C6_P16  SRC GLB_C6_P16.Z0  DST GLB_C6_F5.A0;
   NET  C6_P15  SRC GLB_C6_P15.Z0  DST GLB_C6_F5.A1;
   NE