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📄 fir_top.map.qmsg

📁 logic lock 的vhdl源码
💻 QMSG
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{ "Warning" "WSGN_SKIP_FILE_CANDID_TOP" "mac_tl " "Warning: Found the following files while searching for definition of entity mac_tl, but did not use these files because already using a different file containing the entity definition" { { "Warning" "WSGN_SKIP_FILE_CANDID_SUB" "../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/mac_tl.v " "Warning: File: ../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/mac_tl.v" {  } {  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "../../../../../../megacore/fir_compiler-v2.7.1/lib/scale_accum.v 1 1 " "Info: Using design file ../../../../../../megacore/fir_compiler-v2.7.1/lib/scale_accum.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 scale_accum " "Info: Found entity 1: scale_accum" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/scale_accum.v" "scale_accum" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/scale_accum.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WSGN_SKIP_FILE_CANDID_TOP" "scale_accum " "Warning: Found the following files while searching for definition of entity scale_accum, but did not use these files because already using a different file containing the entity definition" { { "Warning" "WSGN_SKIP_FILE_CANDID_SUB" "../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/scale_accum.v " "Warning: File: ../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/scale_accum.v" {  } {  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "../../../../../../megacore/fir_compiler-v2.7.1/lib/ser_shft.v 1 1 " "Info: Using design file ../../../../../../megacore/fir_compiler-v2.7.1/lib/ser_shft.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 ser_shft " "Info: Found entity 1: ser_shft" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/ser_shft.v" "ser_shft" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/ser_shft.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WSGN_SKIP_FILE_CANDID_TOP" "ser_shft " "Warning: Found the following files while searching for definition of entity ser_shft, but did not use these files because already using a different file containing the entity definition" { { "Warning" "WSGN_SKIP_FILE_CANDID_SUB" "../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/ser_shft.v " "Warning: File: ../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/ser_shft.v" {  } {  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "../../../../../../megacore/fir_compiler-v2.7.1/lib/scale_shft_comb.v 1 1 " "Info: Using design file ../../../../../../megacore/fir_compiler-v2.7.1/lib/scale_shft_comb.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 scale_shft_comb " "Info: Found entity 1: scale_shft_comb" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/scale_shft_comb.v" "scale_shft_comb" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/scale_shft_comb.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WSGN_SKIP_FILE_CANDID_TOP" "scale_shft_comb " "Warning: Found the following files while searching for definition of entity scale_shft_comb, but did not use these files because already using a different file containing the entity definition" { { "Warning" "WSGN_SKIP_FILE_CANDID_SUB" "../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/scale_shft_comb.v " "Warning: File: ../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/scale_shft_comb.v" {  } {  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "../../../../../../megacore/fir_compiler-v2.7.1/lib/ser_ctrl_nc.v 1 1 " "Info: Using design file ../../../../../../megacore/fir_compiler-v2.7.1/lib/ser_ctrl_nc.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 ser_ctrl_nc " "Info: Found entity 1: ser_ctrl_nc" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/ser_ctrl_nc.v" "ser_ctrl_nc" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/ser_ctrl_nc.v" 37 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WSGN_SKIP_FILE_CANDID_TOP" "ser_ctrl_nc " "Warning: Found the following files while searching for definition of entity ser_ctrl_nc, but did not use these files because already using a different file containing the entity definition" { { "Warning" "WSGN_SKIP_FILE_CANDID_SUB" "../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/ser_ctrl_nc.v " "Warning: File: ../../../../../../megacore/fir_compiler-v2.7.1/lib_time_limited/ser_ctrl_nc.v" {  } {  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[11\]~reg0 fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[12\]~reg0 " "Info: Duplicate register fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[11\]~reg0 merged to single register fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[12\]~reg0" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/sadd.v" "" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/sadd.v" 10 -1 0 } }  } 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[13\]~reg0 fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[12\]~reg0 " "Info: Duplicate register fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[13\]~reg0 merged to single register fir_top_st:fir_top_st_component\|sadd:Uaddl_0_n_1_n\|res\[12\]~reg0" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/sadd.v" "" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/sadd.v" 10 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "fir_top_st:fir_top_st_component\|sym_add_ser:sym_18_n\|c_out data_in GND " "Warning: Reduced register fir_top_st:fir_top_st_component\|sym_add_ser:sym_18_n\|c_out with stuck data_in port to stuck value GND" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/sym_add_ser.v" "" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/sym_add_ser.v" 80 -1 0 } }  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "fir_top_st:fir_top_st_component\|lc_tdl_strat:Utdl_1_n\|sft02_n\[12\] fir_top_st:fir_top_st_component\|sym_add_ser:sym_18_n\|data_out\[0\]~reg0 " "Info: Duplicate register fir_top_st:fir_top_st_component\|lc_tdl_strat:Utdl_1_n\|sft02_n\[12\] merged to single register fir_top_st:fir_top_st_component\|sym_add_ser:sym_18_n\|data_out\[0\]~reg0" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/lc_tdl_strat.v" "" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/lc_tdl_strat.v" 99 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IFTM_FTM_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "c:/megacore/fir_compiler-v2.7.1/lib/ser_ctrl_nc.v" "" "" { Text "c:/megacore/fir_compiler-v2.7.1/lib/ser_ctrl_nc.v" 73 -1 0 } }  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "746 " "Info: Implemented 746 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "14 " "Info: Implemented 14 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "29 " "Info: Implemented 29 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "665 " "Info: Implemented 665 logic cells" {  } {  } 0} { "Info" "ISCL_SCL_TM_RAMS" "38 " "Info: Implemented 38 RAM segments" {  } {  } 0}  } {  } 0}
{ "Warning" "WQCU_FOUND_UNUSABLE_ASSIGNMENTS_FOR_ENTITY" "lc_tdl " "Warning: Ignored assignments for entity \"lc_tdl\" -- entity does not exist in design" {  } {  } 0}
{ "Warning" "WQCU_FOUND_UNUSABLE_ASSIGNMENTS_FOR_ENTITY" "lc_tdl_en " "Warning: Ignored assignments for entity \"lc_tdl_en\" -- entity does not exist in design" {  } {  } 0}
{ "Warning" "WQCU_FOUND_UNUSABLE_ASSIGNMENTS_FOR_ENTITY" "lc_tdl_mr " "Warning: Ignored assignments for entity \"lc_tdl_mr\" -- entity does not exist in design" {  } {  } 0}
{ "Warning" "WQCU_FOUND_UNUSABLE_ASSIGNMENTS_FOR_ENTITY" "sadd_lpm " "Warning: Ignored assignments for entity \"sadd_lpm\" -- entity does not exist in design" {  } {  } 0}
{ "Warning" "WQCU_FOUND_UNUSABLE_ASSIGNMENTS_FOR_ENTITY" "tdl_da_lc " "Warning: Ignored assignments for entity \"tdl_da_lc\" -- entity does not exist in design" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 28 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 28 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Feb 19 13:06:27 2004 " "Info: Processing ended: Thu Feb 19 13:06:27 2004" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:09 " "Info: Elapsed time: 00:00:09" {  } {  } 0}  } {  } 0}

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