fir_top.qsf

logic lock 的vhdl源码

set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|scale_shft_comb:Usscx\|res\[5\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|scale_shft_comb:Usscx\|res\[4\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|scale_shft_comb:Usscx\|res\[3\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|scale_shft_comb:Usscx\|res\[2\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X12_Y4 -to "fir_top_st:fir_top_st_component\|scale_shft_comb:Usscx\|res\[1\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X12_Y2 -to "fir_top_st:fir_top_st_component\|scale_shft_comb:Usscx\|res\[0\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X5_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[10\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X5_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[9\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X5_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[8\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg1" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X5_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[7\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg2" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg3" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X5_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[6\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg4" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg5" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[5\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg6" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg7" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[4\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg8" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg9" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[3\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg10" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_datain_reg11" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X9_Y1 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[2\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg1" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg2" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X12_Y2 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[1\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg3" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg4" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X12_Y2 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[0\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg5" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg6" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X5_Y3 -to "fir_top_st:fir_top_st_component\|ser_shft:Usershft\|shft_out\[11\]~reg0" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg7" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg8" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg9" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg10" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y3 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur2_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_6m41:auto_generated\|ram_block1a0~porta_memory_reg11" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg1" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg2" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg3" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg4" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg5" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg6" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg7" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg8" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg9" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg10" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg11" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_datain_reg12" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg1" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg2" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg3" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg4" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X14_Y3 -to "fir_top_st:fir_top_st_component\|scale_accum:Usa\|a_inv_mx\[15\]" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg5" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X14_Y3 -to "fir_top_st:fir_top_st_component\|scale_accum:Usa\|a_inv_mx\[14\]" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg6" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X14_Y3 -to "fir_top_st:fir_top_st_component\|scale_accum:Usa\|a_inv_mx\[13\]" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg7" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X14_Y3 -to "fir_top_st:fir_top_st_component\|scale_accum:Usa\|a_inv_mx\[12\]" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg8" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X14_Y3 -to "fir_top_st:fir_top_st_component\|scale_accum:Usa\|a_inv_mx\[11\]" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg9" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X14_Y3 -to "fir_top_st:fir_top_st_component\|scale_accum:Usa\|a_inv_mx\[10\]" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg10" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION LAB_X14_Y3 -to "fir_top_st:fir_top_st_component\|scale_accum:Usa\|a_inv_mx\[9\]" -section_id fir_lock
set_instance_assignment -name LL_NODE_LOCATION M4K_X15_Y1 -to "fir_top_st:fir_top_st_component\|ram_lut:Ur1_n\|ram_2pt_var:ram\|altsyncram:altsyncram_component\|altsyncram_rs41:auto_generated\|ram_block1a0~porta_memory_reg11" -section_id fir_lock