oplogic.cpp

motorola ezx 平台下的fba模拟器

#include "app.h"

// --------------------- Opcodes 0x0100+ ---------------------
// Emit a Btst (Register) opcode 0000nnn1 ttaaaaaa
int OpBtstReg(int op)
{
  int use=0;
  int type=0,sea=0,tea=0;
  int size=0;

  type=(op>>6)&3; // Btst/Bchg/Bclr/Bset
  // Get source and target EA
  sea=(op>>9)&7;
  tea=op&0x003f;
  if (tea<0x10) size=2; // For registers, 32-bits

  if ((tea&0x38)==0x08) return 1; // movep

  // See if we can do this opcode:
  if (EaCanRead(tea,0)==0) return 1;
  if (type>0)
  {
    if (EaCanWrite(tea)==0) return 1;
  }

  use=OpBase(op);
  use&=~0x0e00; // Use same handler for all registers
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op);

  if(type==1||type==3) {
    Cycles=8;
  } else {
    Cycles=type?8:4;
    if(size>=2) Cycles+=2;
  }

  EaCalc (0,0x0e00,sea,0);
  EaRead (0,     0,sea,0,0x0e00);
  if (tea>=0x10)
       ot("  and r10,r0,#7  ;@ mem - do mod 8\n");
  else ot("  and r10,r0,#31 ;@ reg - do mod 32\n");
  ot("\n");

  EaCalc(11,0x003f,tea,size);
  EaRead(11,     0,tea,size,0x003f);
  ot("  mov r1,#1\n");
  ot("  tst r0,r1,lsl r10 ;@ Do arithmetic\n");
  ot("  bicne r9,r9,#0x40000000\n");
  ot("  orreq r9,r9,#0x40000000 ;@ Get Z flag\n");
  ot("\n");

  if (type>0)
  {
    if (type==1) ot("  eor r1,r0,r1,lsl r10 ;@ Toggle bit\n");
    if (type==2) ot("  bic r1,r0,r1,lsl r10 ;@ Clear bit\n");
    if (type==3) ot("  orr r1,r0,r1,lsl r10 ;@ Set bit\n");
    ot("\n");
    EaWrite(11,   1,tea,size,0x003f);
  }
  OpEnd();

  return 0;
}

// --------------------- Opcodes 0x0800+ ---------------------
// Emit a Btst/Bchg/Bclr/Bset (Immediate) opcode 00001000 ttaaaaaa nn
int OpBtstImm(int op)
{
  int type=0,sea=0,tea=0;
  int use=0;
  int size=0;

  type=(op>>6)&3;
  // Get source and target EA
  sea=   0x003c;
  tea=op&0x003f;
  if (tea<0x10) size=2; // For registers, 32-bits

  // See if we can do this opcode:
  if (EaCanRead(tea,0)==0||EaAn(tea)||tea==0x3c) return 1;
  if (type>0)
  {
    if (EaCanWrite(tea)==0) return 1;
  }

  use=OpBase(op);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op);

  ot("  mov r10,#1\n");
  ot("\n");
  EaCalc ( 0,0x0000,sea,0);
  EaRead ( 0,     0,sea,0,0);
  ot("  bic r9,r9,#0x40000000 ;@ Blank Z flag\n");
  if (tea>=0x10)
       ot("  and r0,r0,#7 ;@ mem - do mod 8\n");
  else ot("  and r0,r0,#0x1F ;@ reg - do mod 32\n");
  ot("  mov r10,r10,lsl r0 ;@ Make bit mask\n");
  ot("\n");

  if(type==1||type==3) {
    Cycles=12;
  } else {
    Cycles=type?12:8;
    if(size>=2) Cycles+=2;
  }

  EaCalc (11,0x003f,tea,size);
  EaRead (11,     0,tea,size,0x003f);
  ot("  tst r0,r10 ;@ Do arithmetic\n");
  ot("  orreq r9,r9,#0x40000000 ;@ Get Z flag\n");
  ot("\n");

  if (type>0)
  {
    if (type==1) ot("  eor r1,r0,r10 ;@ Toggle bit\n");
    if (type==2) ot("  bic r1,r0,r10 ;@ Clear bit\n");
    if (type==3) ot("  orr r1,r0,r10 ;@ Set bit\n");
    ot("\n");
    EaWrite(11,   1,tea,size,0x003f);
  }

  OpEnd();

  return 0;
}

// --------------------- Opcodes 0x4000+ ---------------------
int OpNeg(int op)
{
  // 01000tt0 xxeeeeee (tt=negx/clr/neg/not, xx=size, eeeeee=EA)
  int type=0,size=0,ea=0,use=0;

  type=(op>>9)&3;
  ea  =op&0x003f;
  size=(op>>6)&3; if (size>=3) return 1;

  // See if we can do this opcode:
  if (EaCanRead (ea,size)==0||EaAn(ea)) return 1;
  if (EaCanWrite(ea     )==0) return 1;

  use=OpBase(op);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op);   Cycles=size<2?4:6;
  if(ea >= 0x10) {
    Cycles*=2;
#ifdef CYCLONE_FOR_GENESIS
    // This is same as in Starscream core, CLR uses only 6 cycles for memory EAs.
    // May be this is similar case as with TAS opcode, but this time the dummy
    // read is ignored somehow? Without this hack Fatal Rewind hangs even in Gens.
    if(type==1&&size<2) Cycles-=2;
#endif
  }

  EaCalc (10,0x003f,ea,size);

  if (type!=1) EaRead (10,0,ea,size,0x003f); // Don't need to read for 'clr'
  if (type==1) ot("\n");

  if (type==0)
  {
    ot(";@ Negx:\n");
    GetXBit(1);
    if(size!=2) ot("  mov r0,r0,lsl #%i\n",size?16:24);
    ot("  rscs r1,r0,#0 ;@ do arithmetic\n");
    ot("  orr r3,r9,#0xb0000000 ;@ for old Z\n");
    OpGetFlags(1,1,0);
    if(size!=2) {
	  ot("  movs r1,r1,asr #%i\n",size?16:24);
      ot("  orreq r9,r9,#0x40000000 ;@ possily missed Z\n");
	}
	ot("  andeq r9,r9,r3 ;@ fix Z\n");
    ot("\n");
  }

  if (type==1)
  {
    ot(";@ Clear:\n");
    ot("  mov r1,#0\n");
    ot("  mov r9,#0x40000000 ;@ NZCV=0100\n");
    ot("\n");
  }

  if (type==2)
  {
    ot(";@ Neg:\n");
    if(size!=2) ot("  mov r0,r0,lsl #%i\n",size?16:24);
    ot("  rsbs r1,r0,#0\n");
    OpGetFlags(1,1);
    if(size!=2) ot("  mov r1,r1,asr #%i\n",size?16:24);
    ot("\n");
  }

  if (type==3)
  {
    ot(";@ Not:\n");
    ot("  mvn r1,r0\n");
    ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
    OpGetFlags(0,0);
    ot("\n");
  }

  EaWrite(10,     1,ea,size,0x003f);

  OpEnd();

  return 0;
}

// --------------------- Opcodes 0x4840+ ---------------------
// Swap, 01001000 01000nnn swap Dn
int OpSwap(int op)
{
  int ea=0,use=0;

  ea=op&7;
  use=op&~0x0007; // Use same opcode for all An

  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=4;

  EaCalc (10,0x0007,ea,2,1);
  EaRead (10,     0,ea,2,0x0007,1);

  ot("  mov r1,r0,ror #16\n");
  ot("  adds r1,r1,#0 ;@ Defines NZ, clears CV\n");
  OpGetFlags(0,0);

  EaWrite(10,     1,8,2,0x0007,1);

  OpEnd();

  return 0;
}

// --------------------- Opcodes 0x4a00+ ---------------------
// Emit a Tst opcode, 01001010 xxeeeeee
int OpTst(int op)
{
  int sea=0;
  int size=0,use=0;

  sea=op&0x003f;
  size=(op>>6)&3; if (size>=3) return 1;

  // See if we can do this opcode:
  if (EaCanWrite(sea)==0||EaAn(sea)) return 1;

  use=OpBase(op);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=4;

  EaCalc ( 0,0x003f,sea,size,1);
  EaRead ( 0,     0,sea,size,0x003f,1);

  ot("  adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
  ot("  mrs r9,cpsr ;@ r9=flags\n");
  ot("\n");

  OpEnd();
  return 0;
}

// --------------------- Opcodes 0x4880+ ---------------------
// Emit an Ext opcode, 01001000 1x000nnn
int OpExt(int op)
{
  int ea=0;
  int size=0,use=0;
  int shift=0;

  ea=op&0x0007;
  size=(op>>6)&1;
  shift=32-(8<<size);

  use=OpBase(op);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=4;

  EaCalc (10,0x0007,ea,size+1);
  EaRead (10,     0,ea,size+1,0x0007);

  ot("  mov r0,r0,asl #%d\n",shift);
  ot("  adds r0,r0,#0 ;@ Defines NZ, clears CV\n");
  ot("  mrs r9,cpsr ;@ r9=flags\n");
  ot("  mov r1,r0,asr #%d\n",shift);
  ot("\n");

  EaWrite(10,     1,ea,size+1,0x0007);

  OpEnd();
  return 0;
}

// --------------------- Opcodes 0x50c0+ ---------------------
// Emit a Set cc opcode, 0101cccc 11eeeeee
int OpSet(int op)
{
  int cc=0,ea=0;
  int size=0,use=0;
  char *cond[16]=
  {
    "al","", "hi","ls","cc","cs","ne","eq",
    "vc","vs","pl","mi","ge","lt","gt","le"
  };

  cc=(op>>8)&15;
  ea=op&0x003f;

  if ((ea&0x38)==0x08) return 1; // dbra, not scc
  
  // See if we can do this opcode:
  if (EaCanWrite(ea)==0) return 1;

  use=OpBase(op);
  if (op!=use) { OpUse(op,use); return 0; } // Use existing handler

  OpStart(op); Cycles=8;
  if (ea<8) Cycles=4;

  ot("  mov r1,#0\n");

  if (cc!=1)
  {
    ot(";@ Is the condition true?\n");
    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
    ot("  msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");
    if ((cc&~1)==2) ot("  eor r9,r9,#0x20000000 ;@ Invert carry for hi/ls\n");
    ot("  mvn%s r1,r1\n",cond[cc]);
  }