clock.ucf

来自「vhdl经典源代码——时钟设计」· UCF 代码 · 共 27 行

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "clk"  LOC = "p80"  ;
NET "dataout<7>"  LOC = "p96"  ;
NET "dataout<6>"  LOC = "p97"  ;
NET "dataout<5>"  LOC = "p100"  ;
NET "dataout<4>"  LOC = "p93"  ;
NET "dataout<3>"  LOC = "p94"  ;
NET "dataout<2>"  LOC = "p95"  ;
NET "dataout<1>"  LOC = "p86"  ;
NET "dataout<0>"  LOC = "p87"  ;

NET "en<0>"  LOC = "p76"  ;
NET "en<1>"  LOC = "p81"  ;
NET "en<2>"  LOC = "p85"  ;
NET "en<3>"  LOC = "p78"  ;
NET "en<4>"  LOC = "p77"  ;
NET "en<5>"  LOC = "p90"  ;
NET "rst"  LOC = "p161"  ;

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE