clock.gfl

vhdl经典源代码——时钟设计

# Schematic : View HDL Functional Model
clock.vhf
clock.cmd_log
# XST (Creating Lso File) : 
clock.lso
# xst flow : RunXST
clock.syr
clock.prj
clock.sprj
clock.ana
clock.stx
clock.cmd_log
clock.ngc
clock.ngr
# Implmentation : Translate (CPLD flow)
__projnav/clock_edfTOngd_tcl.rsp
clock.ngd
clock.bld
clock_ngdbuild.nav
_ngo/netlist.lst
clock.ucf.untf
clock_html
clock.cmd_log
# Implmentation : Fit
__projnav/clock_ngdTOvm6_tcl.rsp
clock.vm6
clock.cxt
clock.blx
clock.mfd
clock.rpt
clock.log
clock.pnx
clock.gyd
clock.xml
clock_build.xml
clock.ptf
clock.bl
errors.xml
tmperr.err
clock.cmd_log
# Generate Programming File (CPLD flow)
__projnav/clock_vm6TOjed_tcl.rsp
clock.jed
clock.isc
clock.cmd_log
# Implmentation : Generate Timing
__projnav/clock_vm6TOtim_tcl.rsp
clock.tim
clock.mod
clock.data
clock.cmd_log
e:\temp\95144\vhdl\interface\clock/clock_html
__projnav\taengine.err
# Implmentation : FitRpt
clock_html
clock._hrpt
clock.cmd_log
# Implmentation : FitRpt
clock.imp
# Schematic : PDCL (jhdparse)
__projnav/clock_jhdparse_tcl.rsp
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
__projnav/vhd2spl.err
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
__projnav/vhd2spl.err
# Schematic : View HDL Functional Model
clock.vhf
clock.cmd_log
# Schematic : PDCL (jhdparse)
__projnav/clock_jhdparse_tcl.rsp
# Schematic : View HDL Functional Model
clock.vhf
clock.cmd_log
# XST (Creating Lso File) : 
clock.lso
# xst flow : RunXST
clock_summary.html
# xst flow : RunXST
clock.syr
clock.prj
clock.sprj
clock.ana
clock.stx
clock.cmd_log
clock.ngc
clock.ngr
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\cindy\working\ue_extboard\sp3\vhdl\clock/_ngo"
clock.ngd
clock_ngdbuild.nav
clock.bld
clock.ucf.untf
clock.cmd_log
# Implementation : Map
clock_summary.html
# Implementation : Map
clock_map.ncd
clock.ngm
clock.pcf
clock.nc1
clock.mrp
clock_map.mrp
clock.mdf
clock.cmd_log
MAP_NO_GUIDE_FILE_CPF "clock"
clock_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
clock.twr
clock.twx
clock.tsi
clock.cmd_log
# Implementation : Place & Route
clock_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
clock.ncd
clock.par
clock.pad
clock_pad.txt
clock_pad.csv
clock.pad_txt
clock.dly
reportgen.log
clock.xpi
clock.grf
clock.itr
clock_last_par.ncd
clock.placed_ncd_tracker
clock.routed_ncd_tracker
clock.cmd_log
PAR_NO_GUIDE_FILE_CPF "clock"
# xst flow : RunXST
clock_summary.html
# Schematic : View HDL Functional Model
clock.vhf
clock.cmd_log
# XST (Creating Lso File) : 
clock.lso
# xst flow : RunXST
clock_summary.html
# xst flow : RunXST
clock.syr
clock.prj
clock.sprj
clock.ana
clock.stx
clock.cmd_log
clock.ngc
clock.ngr
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\cindy\working\ue_extboard\sp3\vhdl\clock/_ngo"
clock.ngd
clock_ngdbuild.nav
clock.bld
clock.ucf.untf
clock.cmd_log
# Implementation : Map
clock_summary.html
# Implementation : Map
clock_map.ncd
clock.ngm
clock.pcf
clock.nc1
clock.mrp
clock_map.mrp
clock.mdf
clock.cmd_log
MAP_NO_GUIDE_FILE_CPF "clock"
clock_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
clock.twr
clock.twx
clock.tsi
clock.cmd_log
# Implementation : Place & Route
clock_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
clock.ncd
clock.par
clock.pad
clock_pad.txt
clock_pad.csv
clock.pad_txt
clock.dly
reportgen.log
clock.xpi
clock.grf
clock.itr
clock_last_par.ncd
clock.placed_ncd_tracker
clock.routed_ncd_tracker
clock.cmd_log
PAR_NO_GUIDE_FILE_CPF "clock"
# Generate Programming File
__projnav/clock_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
clock.ut
# Generate Programming File
clock.bgn
clock.rbt
clock.ll
clock.msk
clock.drc
clock.nky
clock.bit
clock.bin
clock.isc
clock.cmd_log
# XST (Creating Lso File) : 
clock.lso
# xst flow : RunXST
clock_summary.html
# xst flow : RunXST
clock.syr
clock.prj
clock.sprj
clock.ana
clock.stx
clock.cmd_log
clock.ngc
clock.ngr
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\cindy\working\ue_extboard\sp3\vhdl\clock/_ngo"
clock.ngd
clock_ngdbuild.nav
clock.bld
clock.ucf.untf
clock.cmd_log
# Implementation : Map
clock_summary.html
# Implementation : Map
clock_map.ncd
clock.ngm
clock.pcf
clock.nc1
clock.mrp
clock_map.mrp
clock.mdf
clock.cmd_log
MAP_NO_GUIDE_FILE_CPF "clock"
clock_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
clock.twr
clock.twx
clock.tsi
clock.cmd_log
# Implementation : Place & Route
clock_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
clock.ncd
clock.par
clock.pad
clock_pad.txt
clock_pad.csv
clock.pad_txt
clock.dly
reportgen.log
clock.xpi
clock.grf
clock.itr
clock_last_par.ncd
clock.placed_ncd_tracker
clock.routed_ncd_tracker
clock.cmd_log
PAR_NO_GUIDE_FILE_CPF "clock"
# Generate Programming File
__projnav/clock_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
clock.ut
# Generate Programming File
clock.bgn
clock.rbt
clock.ll
clock.msk
clock.drc
clock.nky
clock.bit
clock.bin
clock.isc
clock.cmd_log
# Configure Device (iMPACT)
clock.prm
clock.isc
clock.svf
xilinx.sys
clock.mcs
clock.exo
clock.hex
clock.tek
clock.dst
clock.dst_compressed
clock.mpm
_impact.cmd
_impact.log
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\cindy\working\ue_extboard\sp3\vhdl\clock/_ngo"
clock.ngd
clock_ngdbuild.nav
clock.bld
clock.ucf.untf
clock.cmd_log
# Implementation : Map
clock_summary.html
# Implementation : Map
clock_map.ncd
clock.ngm
clock.pcf
clock.nc1
clock.mrp
clock_map.mrp
clock.mdf
clock.cmd_log
MAP_NO_GUIDE_FILE_CPF "clock"
clock_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
clock.twr
clock.twx
clock.tsi
clock.cmd_log
# Implementation : Place & Route
clock_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
clock.ncd
clock.par
clock.pad
clock_pad.txt
clock_pad.csv
clock.pad_txt
clock.dly
reportgen.log
clock.xpi
clock.grf
clock.itr
clock_last_par.ncd
clock.placed_ncd_tracker
clock.routed_ncd_tracker
clock.cmd_log
PAR_NO_GUIDE_FILE_CPF "clock"
# Generate Programming File
__projnav/clock_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
clock.ut
# Generate Programming File
clock.bgn
clock.rbt
clock.ll
clock.msk
clock.drc
clock.nky
clock.bit
clock.bin
clock.isc
clock.cmd_log
# Configure Device (iMPACT)
clock.prm
clock.isc
clock.svf
xilinx.sys
clock.mcs
clock.exo
clock.hex
clock.tek
clock.dst
clock.dst_compressed
clock.mpm
_impact.cmd
_impact.log
# xst flow : RunXST
clock_summary.html
# xst flow : RunXST
clock_summary.html
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
__projnav/vhd2spl.err
# Schematic : PDCL (jhdparse)
__projnav/clock_jhdparse_tcl.rsp
# VHDL : Create Schematic Symbol
__projnav/tb.rsp
__projnav/vhd2spl.err
# Schematic : PDCL (jhdparse)
__projnav/clock_jhdparse_tcl.rsp
# Schematic : View HDL Functional Model
clock.vhf
clock.cmd_log
# XST (Creating Lso File) : 
clock.lso
# xst flow : RunXST
clock_summary.html
# xst flow : RunXST
clock.syr
clock.prj
clock.sprj
clock.ana
clock.stx
clock.cmd_log
clock.ngc
clock.ngr
# Schematic : View HDL Functional Model
clock.vhf
clock.cmd_log
# XST (Creating Lso File) : 
clock.lso
# xst flow : RunXST
clock_summary.html
# xst flow : RunXST
clock.syr
clock.prj
clock.sprj
clock.ana
clock.stx
clock.cmd_log
clock.ngc
clock.ngr
# Implmentation : Translate
__projnav/ednTOngd_tcl.rsp
"e:\temp\sp3-u\ue basic board\vhdl\clock/_ngo"
clock.ngd
clock_ngdbuild.nav
clock.bld
clock.ucf.untf
clock.cmd_log
# Implementation : Map
clock_summary.html
# Implementation : Map
clock_map.ncd
clock.ngm
clock.pcf
clock.nc1
clock.mrp
clock_map.mrp
clock.mdf
clock.cmd_log
MAP_NO_GUIDE_FILE_CPF "clock"
clock_map.ngm
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
clock.twr
clock.twx
clock.tsi
clock.cmd_log
# Implementation : Place & Route
clock_summary.html
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
clock.ncd
clock.par
clock.pad
clock_pad.txt
clock_pad.csv
clock.pad_txt
clock.dly
reportgen.log
clock.xpi
clock.grf
clock.itr
clock_last_par.ncd
clock.placed_ncd_tracker
clock.routed_ncd_tracker
clock.cmd_log
PAR_NO_GUIDE_FILE_CPF "clock"
# Generate Programming File
__projnav/clock_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
clock.ut
# Generate Programming File
clock.bgn
clock.rbt
clock.ll
clock.msk
clock.drc
clock.nky
clock.bit
clock.bin
clock.isc
clock.cmd_log
# Configure Device (iMPACT)
clock.prm
clock.isc
clock.svf
xilinx.sys
clock.mcs
clock.exo
clock.hex
clock.tek
clock.dst
clock.dst_compressed
clock.mpm
_impact.cmd
_impact.log