clock.pcf

vhdl经典源代码——时钟设计

//! **************************************************************************
// Written by: Map H.38 on Fri Mar 17 10:23:43 2006
//! **************************************************************************

SCHEMATIC START;
COMP "dataout<0>" LOCATE = SITE "P87" LEVEL 1;
COMP "clk" LOCATE = SITE "P80" LEVEL 1;
COMP "dataout<1>" LOCATE = SITE "P86" LEVEL 1;
COMP "dataout<2>" LOCATE = SITE "P95" LEVEL 1;
COMP "dataout<3>" LOCATE = SITE "P94" LEVEL 1;
COMP "dataout<4>" LOCATE = SITE "P93" LEVEL 1;
COMP "dataout<5>" LOCATE = SITE "P100" LEVEL 1;
COMP "dataout<6>" LOCATE = SITE "P97" LEVEL 1;
COMP "dataout<7>" LOCATE = SITE "P96" LEVEL 1;
COMP "en<0>" LOCATE = SITE "P76" LEVEL 1;
COMP "en<1>" LOCATE = SITE "P81" LEVEL 1;
COMP "en<2>" LOCATE = SITE "P85" LEVEL 1;
COMP "en<3>" LOCATE = SITE "P78" LEVEL 1;
COMP "en<4>" LOCATE = SITE "P77" LEVEL 1;
COMP "en<5>" LOCATE = SITE "P90" LEVEL 1;
COMP "rst" LOCATE = SITE "P161" LEVEL 1;
NET "clk_BUFGP/IBUFG" BEL "clk_BUFGP/BUFG.GCLKMUX" USELOCALCONNECT;
SCHEMATIC END;