clock.bld

来自「vhdl经典源代码——时钟设计」· BLD 代码 · 共 23 行

Release 7.1i ngdbuild H.38
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -intstyle ise -dd "e:\temp\sp3-u\ue basic
board\vhdl\clock/_ngo" -uc clock.ucf -p xc3s400-pq208-5 clock.ngc clock.ngd 

Reading NGO file 'E:/temp/sp3-U/UE Basic Board/VHDL/clock/clock.ngc' ...

Applying constraints in "clock.ucf" to the design...

Checking timing specifications ...
Checking expanded design ...

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 54156 kilobytes

Writing NGD file "clock.ngd" ...

Writing NGDBUILD log file "clock.bld"...