📄 vga.rpt
字号:
cpldfit: version H.42 Xilinx Inc.
Fitter Report
Design Name: vga Date: 2-21-2006, 11:19AM
Device Used: XC95144XL-10-TQ144
Fitting Status: Successful
************************* Mapped Resource Summary **************************
Macrocells Product Terms Function Block Registers Pins
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
38 /144 ( 26%) 152 /720 ( 21%) 59 /432 ( 14%) 21 /144 ( 15%) 7 /117 ( 6%)
** Function Block Resources **
Function Mcells FB Inps Pterms IO
Block Used/Tot Used/Tot Used/Tot Used/Tot
FB1 11/18 10/54 30/90 0/15
FB2 15/18 10/54 44/90 1/15
FB3 3/18 10/54 28/90 0/15
FB4 4/18 17/54 26/90 4/15
FB5 3/18 10/54 21/90 0/14
FB6 2/18 2/54 3/90 0/13
FB7 0/18 0/54 0/90 0/15
FB8 0/18 0/54 0/90 0/15
----- ----- ----- -----
38/144 59/432 152/720 5/117
* - Resource is exhausted
** Global Control Resources **
Global clock net(s) unused.
Global output enable net(s) unused.
Global set/reset net(s) unused.
** Pin Resources **
Signal Type Required Mapped | Pin Type Used Total
------------------------------------|------------------------------------
Input : 2 2 | I/O : 7 109
Output : 5 5 | GCK/IO : 0 3
Bidirectional : 0 0 | GTS/IO : 0 4
GCK : 0 0 | GSR/IO : 0 1
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 7 7
** Power Data **
There are 38 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
************************** Errors and Warnings ***************************
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB4,
because too many function block product terms are required. Buffering output
signal b to allow all signals assigned to this function block to be placed.
************************* Summary of Mapped Logic ************************
** 5 Outputs **
Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init
Name Pts Inps No. Type Use Mode Rate State
vs 1 4 FB2_1 142 I/O O STD FAST
r 20 15 FB4_10 135 I/O O STD FAST
g 4 8 FB4_13 137 I/O O STD FAST
b 1 1 FB4_15 138 I/O O STD FAST
hs 1 2 FB4_16 139 I/O O STD FAST
** 33 Buried Nodes **
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
fs<0> 1 1 FB1_8 STD RESET
cc<0> 1 1 FB1_9 STD RESET
fs<2> 2 3 FB1_10 STD RESET
fs<1> 2 2 FB1_11 STD RESET
cc<4> 2 5 FB1_12 STD RESET
cc<3> 2 4 FB1_13 STD RESET
cc<2> 2 3 FB1_14 STD RESET
cc<1> 2 2 FB1_15 STD RESET
$OpTx$FX_DC$545 4 4 FB1_16 STD
$OpTx$FX_DC$542 4 5 FB1_17 STD
grbx<1>/grbx<1>_D2 8 5 FB1_18 STD
ll<0> 1 1 FB2_5 STD RESET
ll<4> 2 5 FB2_6 STD RESET
ll<3> 2 4 FB2_7 STD RESET
ll<2> 2 3 FB2_8 STD RESET
ll<8> 3 10 FB2_9 STD RESET
ll<7> 3 10 FB2_10 STD RESET
ll<6> 3 10 FB2_11 STD RESET
ll<5> 3 10 FB2_12 STD RESET
ll<1> 3 10 FB2_13 STD RESET
Mcompar__n0036_N3/Mcompar__n0036_N3_D2 3 6 FB2_14 STD
$OpTx$FX_DC$543 3 6 FB2_15 STD
_n0033/_n0033_D2 4 7 FB2_16 STD
$OpTx$$OpTx$INV$521_INV$825 4 7 FB2_17 STD
grby<1>13/grby<1>13_D2 7 7 FB2_18 STD
mmd<1> 2 3 FB3_1 STD RESET
b_BUFR 24 10 FB3_12 STD
mmd<0> 2 3 FB3_15 STD RESET
$OpTx$grbp<3>/grbp<3>_D2_INV$826 17 10 FB5_1 STD
grby<3>/grby<3>_D2 2 5 FB5_16 STD
$OpTx$FX_DC$535 2 6 FB5_17 STD
clk_int<0> 1 1 FB6_17 STD RESET
clk_int<1> 2 2 FB6_18 STD RESET
** 2 Inputs **
Signal Loc Pin Pin Pin
Name No. Type Use
clk FB4_5 128 I/O I
orient FB5_13 70 I/O I
Legend:
Pin No. - ~ - User Assigned
************************** Function Block Details ************************
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X - Signal used as input to the macrocell logic.
Pin No. - ~ - User Assigned
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 10/44
Number of signals used by logic mapping into function block: 10
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 /\2 3 FB1_1 23 I/O (b)
(unused) 0 0 0 5 FB1_2 16 I/O
(unused) 0 0 0 5 FB1_3 17 I/O
(unused) 0 0 0 5 FB1_4 25 I/O
(unused) 0 0 0 5 FB1_5 19 I/O
(unused) 0 0 0 5 FB1_6 20 I/O
(unused) 0 0 0 5 FB1_7 (b)
fs<0> 1 0 0 4 FB1_8 21 I/O (b)
cc<0> 1 0 0 4 FB1_9 22 I/O (b)
fs<2> 2 0 0 3 FB1_10 31 I/O (b)
fs<1> 2 0 0 3 FB1_11 24 I/O (b)
cc<4> 2 0 0 3 FB1_12 26 I/O (b)
cc<3> 2 0 0 3 FB1_13 (b) (b)
cc<2> 2 0 0 3 FB1_14 27 I/O (b)
cc<1> 2 0 0 3 FB1_15 28 I/O (b)
$OpTx$FX_DC$545 4 0 0 1 FB1_16 35 I/O (b)
$OpTx$FX_DC$542 4 0 \/1 0 FB1_17 30 GCK/I/O (b)
grbx<1>/grbx<1>_D2 8 3<- 0 0 FB1_18 (b) (b)
Signals Used by Logic in Function Block
1: cc<0> 5: cc<4> 8: fs<1>
2: cc<1> 6: clk_int<1> 9: fs<2>
3: cc<2> 7: fs<0> 10: mmd<0>
4: cc<3>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
fs<0> .....X.................................. 1
cc<0> ........X............................... 1
fs<2> .....XXX................................ 3
fs<1> .....XX................................. 2
cc<4> XXXX....X............................... 5
cc<3> XXX.....X............................... 4
cc<2> XX......X............................... 3
cc<1> X.......X............................... 2
$OpTx$FX_DC$545 .XXXX................................... 4
$OpTx$FX_DC$542 .XXXX....X.............................. 5
grbx<1>/grbx<1>_D2 XXXXX................................... 5
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 10/44
Number of signals used by logic mapping into function block: 10
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
vs 1 0 /\1 3 FB2_1 142 I/O O
(unused) 0 0 0 5 FB2_2 143 GSR/I/O
(unused) 0 0 0 5 FB2_3 (b)
(unused) 0 0 0 5 FB2_4 4 I/O
ll<0> 1 0 0 4 FB2_5 2 GTS/I/O (b)
ll<4> 2 0 0 3 FB2_6 3 GTS/I/O (b)
ll<3> 2 0 0 3 FB2_7 (b) (b)
ll<2> 2 0 0 3 FB2_8 5 GTS/I/O (b)
ll<8> 3 0 0 2 FB2_9 6 GTS/I/O (b)
ll<7> 3 0 0 2 FB2_10 7 I/O (b)
ll<6> 3 0 0 2 FB2_11 9 I/O (b)
ll<5> 3 0 0 2 FB2_12 10 I/O (b)
ll<1> 3 0 0 2 FB2_13 12 I/O (b)
Mcompar__n0036_N3/Mcompar__n0036_N3_D2
3 0 0 2 FB2_14 11 I/O (b)
$OpTx$FX_DC$543 3 0 0 2 FB2_15 13 I/O (b)
_n0033/_n0033_D2 4 0 0 1 FB2_16 14 I/O (b)
$OpTx$$OpTx$INV$521_INV$825
4 0 \/1 0 FB2_17 15 I/O (b)
grby<1>13/grby<1>13_D2
7 2<- 0 0 FB2_18 (b) (b)
Signals Used by Logic in Function Block
1: cc<4> 5: ll<3> 8: ll<6>
2: ll<0> 6: ll<4> 9: ll<7>
3: ll<1> 7: ll<5> 10: ll<8>
4: ll<2>
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
vs ......XXXX.............................. 4
ll<0> X....................................... 1
ll<4> XXXXX................................... 5
ll<3> XXXX.................................... 4
ll<2> XXX..................................... 3
ll<8> XXXXXXXXXX.............................. 10
ll<7> XXXXXXXXXX.............................. 10
ll<6> XXXXXXXXXX.............................. 10
ll<5> XXXXXXXXXX.............................. 10
ll<1> XXXXXXXXXX.............................. 10
Mcompar__n0036_N3/Mcompar__n0036_N3_D2
....XXXXXX.............................. 6
$OpTx$FX_DC$543 ....XXXXXX.............................. 6
_n0033/_n0033_D2 ...XXXXXXX.............................. 7
$OpTx$$OpTx$INV$521_INV$825
...XXXXXXX.............................. 7
grby<1>13/grby<1>13_D2
...XXXXXXX.............................. 7
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 10/44
Number of signals used by logic mapping into function block: 10
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
mmd<1> 2 0 0 3 FB3_1 39 I/O (b)
(unused) 0 0 0 5 FB3_2 32 GCK/I/O
(unused) 0 0 0 5 FB3_3 41 I/O
(unused) 0 0 0 5 FB3_4 44 I/O
(unused) 0 0 0 5 FB3_5 33 I/O
(unused) 0 0 0 5 FB3_6 34 I/O
(unused) 0 0 0 5 FB3_7 46 I/O
(unused) 0 0 0 5 FB3_8 38 GCK/I/O
(unused) 0 0 0 5 FB3_9 40 I/O
(unused) 0 0 \/4 1 FB3_10 48 I/O (b)
(unused) 0 0 \/5 0 FB3_11 43 I/O (b)
b_BUFR 24 19<- 0 0 FB3_12 45 I/O (b)
(unused) 0 0 /\5 0 FB3_13 (b) (b)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -