baseball_top.csf.rpt

用VHDL开发的棒球游戏

| batting:Inst_batting|out2       | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 1                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|out3       | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 1                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|out4       | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 1                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|out5       | 0                            | 0                            | 0                            | 0                            | 0                            | 1                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|out6       | 0                            | 0                            | 0                            | 0                            | 1                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|out7       | 0                            | 0                            | 0                            | 1                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|fair       | 0                            | 0                            | 1                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|three_base | 0                            | 1                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| batting:Inst_batting|two_base   | 1                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
+---------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+-----------------------------+-----------------------------+

+-----------------------------------------------------------------------------+
| base:Inst_base_state|sreg                                                   |
+-----------------------------------------------------------------------------+
+----------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+-----------------------------+-----------------------------+
| Name                             | base:Inst_base_state|sreg~15 | base:Inst_base_state|sreg~14 | base:Inst_base_state|sreg~13 | base:Inst_base_state|sreg~12 | base:Inst_base_state|sreg~11 | base:Inst_base_state|sreg~10 | base:Inst_base_state|sreg~9 | base:Inst_base_state|sreg~8 |
+----------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+-----------------------------+-----------------------------+
| base:Inst_base_state|no_runner   | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 0                           |
| base:Inst_base_state|runner1     | 0                            | 0                            | 0                            | 0                            | 0                            | 0                            | 1                           | 1                           |
| base:Inst_base_state|runner1_2   | 0                            | 0                            | 0                            | 0                            | 0                            | 1                            | 0                           | 1                           |
| base:Inst_base_state|runner1_2_3 | 0                            | 0                            | 0                            | 0                            | 1                            | 0                            | 0                           | 1                           |
| base:Inst_base_state|runner1_3   | 0                            | 0                            | 0                            | 1                            | 0                            | 0                            | 0                           | 1                           |
| base:Inst_base_state|runner2     | 0                            | 0                            | 1                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| base:Inst_base_state|runner2_3   | 0                            | 1                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
| base:Inst_base_state|runner3     | 1                            | 0                            | 0                            | 0                            | 0                            | 0                            | 0                           | 1                           |
+----------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+-----------------------------+-----------------------------+

+-----------------------------------------------------------------------------+
| score:Inst_score_state|sreg                                                 |
+-----------------------------------------------------------------------------+
+-----------------------------+--------------------------------+--------------------------------+--------------------------------+-------------------------------+-------------------------------+
| Name                        | score:Inst_score_state|sreg~12 | score:Inst_score_state|sreg~11 | score:Inst_score_state|sreg~10 | score:Inst_score_state|sreg~9 | score:Inst_score_state|sreg~8 |
+-----------------------------+--------------------------------+--------------------------------+--------------------------------+-------------------------------+-------------------------------+
| score:Inst_score_state|idle | 0                              | 0                              | 0                              | 0                             | 0                             |
| score:Inst_score_state|add2 | 0                              | 0                              | 0                              | 1                             | 1                             |
| score:Inst_score_state|add3 | 0                              | 0                              | 1                              | 0                             | 1                             |
| score:Inst_score_state|add4 | 0                              | 1                              | 0                              | 0                             | 1                             |
| score:Inst_score_state|add1 | 1                              | 0                              | 0                              | 0                             | 1                             |
+-----------------------------+--------------------------------+--------------------------------+--------------------------------+-------------------------------+-------------------------------+

+-----------------------------------------------------------------------------+
| Logic Options                                                               |
+-----------------------------------------------------------------------------+
+-------------------------------------------------+-------+
| Name                                            | Value |
+-------------------------------------------------+-------+
| Optimization Technique -- FLEX 10K/10KE/ACEX 1K | Area  |
| Power-Up Don't Care                             | On    |
+-------------------------------------------------+-------+

+-----------------------------------------------------------------------------+
| Resource Utilization by Entity                                              |
+-----------------------------------------------------------------------------+
+---------------------------------------------+-------------+-----------+-------------+------+--------------+-------------------+------------------+--------------------------------------------------------------------------------------------------------------+
| Compilation Hierarchy Node                  | Logic Cells | Registers | Memory Bits | Pins | LUT-Only LCs | Register-Only LCs | LUT/Register LCs | Full Hierarchy Name                                                                                          |
+---------------------------------------------+-------------+-----------+-------------+------+--------------+-------------------+------------------+--------------------------------------------------------------------------------------------------------------+
| |baseball_top                               | 158 (8)     | 68        | 0           | 35   | 90 (4)       | 13 (4)            | 55 (0)           | |baseball_top                                                                                                |
|    |base:Inst_base_state|                   | 49 (49)     | 11        | 0           | 0    | 38 (38)      | 0 (0)             | 11 (11)          | |baseball_top|base:Inst_base_state                                                                           |
|    |baseball_led_out:Inst_baseball_led_out| | 33 (29)     | 8         | 0           | 0    | 25 (21)      | 8 (8)             | 0 (0)            | |baseball_top|baseball_led_out:Inst_baseball_led_out                                                         |
|       |lpm_add_sub:add_9|                   | 4 (0)       | 0         | 0           | 0    | 4 (0)        | 0 (0)             | 0 (0)            | |baseball_top|baseball_led_out:Inst_baseball_led_out|lpm_add_sub:add_9                                       |
|          |addcore:adder|                    | 4 (1)       | 0         | 0           | 0    | 4 (1)        | 0 (0)             | 0 (0)            | |baseball_top|baseball_led_out:Inst_baseball_led_out|lpm_add_sub:add_9|addcore:adder                         |
|             |a_csnbuffer:result_node|       | 3 (3)       | 0         | 0           | 0    | 3 (3)        | 0 (0)             | 0 (0)            | |baseball_top|baseball_led_out:Inst_baseball_led_out|lpm_add_sub:add_9|addcore:adder|a_csnbuffer:result_node |
|    |batlatch:Inst_batting_latch|            | 10 (10)     | 7         | 0           | 0    | 3 (3)        | 0 (0)             | 7 (7)            | |baseball_top|batlatch:Inst_batting_latch                                                                    |
|    |batter_led_dec:Inst_batter_led_dec|     | 4 (4)       | 0         | 0           | 0    | 4 (4)        | 0 (0)             | 0 (0)            | |baseball_top|batter_led_dec:Inst_batter_led_dec                                                             |
|    |batting:Inst_batting|                   | 13 (13)     | 13        | 0           | 0    | 0 (0)        | 0 (0)             | 13 (13)          | |baseball_top|batting:Inst_batting                                                                           |
|    |clk_div:clk_divider|                    | 15 (0)      | 15        | 0           | 0    | 0 (0)        | 0 (0)             | 15 (0)           | |baseball_top|clk_div:clk_divider                                                                            |
|       |lpm_counter:div_dff_rtl_0|           | 15 (0)      | 15        | 0           | 0    | 0 (0)        | 0 (0)             | 15 (0)           | |baseball_top|clk_div:clk_divider|lpm_counter:div_dff_rtl_0                                                  |
|          |alt_counter_f10ke:wysi_counter|   | 15 (15)     | 15        | 0           | 0    | 0 (0)        | 0 (0)             | 15 (15)          | |baseball_top|clk_div:clk_divider|lpm_counter:div_dff_rtl_0|alt_counter_f10ke:wysi_counter                   |
|    |outcount:Inst_out_counter|              | 7 (7)       | 5         | 0           | 0    | 2 (2)        | 1 (1)             | 4 (4)            | |baseball_top|outcount:Inst_out_counter                                                                      |
|    |score:Inst_score_state|                 | 19 (19)     | 5         | 0           | 0    | 14 (14)      | 0 (0)             | 5 (5)            | |baseball_top|score:Inst_score_state                                                                         |
+---------------------------------------------+-------------+-----------+-------------+------+--------------+-------------------+------------------+--------------------------------------------------------------------------------------------------------------+

+-----------------------------------------------------------------------------+
| Device Options                                                              |
+-----------------------------------------------------------------------------+
+------------------------------------------------------------------+---------------------+
| Option                                                           | Setting             |
+------------------------------------------------------------------+---------------------+
| Auto-restart configuration after error                           | Off                 |
| Release clears before tri-states                                 | Off                 |
| Enable user-supplied start-up clock (CLKUSR)                     | Off                 |
| Enable device-wide reset (DEV_CLRn)                              | Off                 |
| Enable device-wide output enable (DEV_OE)                        | Off                 |
| Enable INIT_DONE output                                          | Off                 |
| Auto-increment JTAG user code for multiple configuration devices | On                  |
| Disable CONF_DONE and nSTATUS pull-ups on configuration device   | Off                 |
| Generate compressed bitstreams                                   | Off                 |
| Generate Tabular Text File (.ttf)                                | Off                 |
| Generate Raw Binary File (.rbf)                                  | Off                 |
| Generate Hexadecimal Output File (.hexout)                       | Off                 |
| Configuration scheme                                             | Passive Serial      |
| Hexadecimal Output File count direction                          | Up                  |
| Hexadecimal Output File start address                            | 0                   |
| Reserve all unused pins                                          | As input tri-stated |
| Configuration device                                             | EPC2                |
| Base pin-out file on sameframe device                            | Off                 |
| Auto user code                                                   | Off                 |
| Configuration device auto user code                              | Off                 |
| JTAG user code for target device                                 | 0X7F                |
| JTAG user code for configuration device                          | 0XFFFFFFFF          |
+------------------------------------------------------------------+---------------------+

+-----------------------------------------------------------------------------+
| Floorplan View                                                              |
+-----------------------------------------------------------------------------+
Floorplan report data cannot be output to ASCII.
Please use Quartus II to view the floorplan report data.

+-----------------------------------------------------------------------------+
| Input Pins                                                                  |
+-----------------------------------------------------------------------------+
+--------+-------+-----+------+---------+--------+--------------+-------------------------+---------------+-----------------+---------------+--------------+
| Name   | Pin # | Row | Col. | Fan-Out | Global | I/O Register | Use Local Routing Input | Power Up High | PCI I/O Enabled | Single-Pin CE | I/O Standard |
+--------+-------+-----+------+---------+--------+--------------+-------------------------+---------------+-----------------+---------------+--------------+
| resetn | 32    | --  | 16   | 38      | no     | no           | no                      | no            | no              | no            | LVTTL/LVCMOS |
| clk    | 39    | --  | --   | 17      | yes    | no           | no                      | no            | no              | no            | LVTTL/LVCMOS |
| hitn   | 31    | --  | 17   | 1       | no     | no           | no                      | no            | no              | no            | LVTTL/LVCMOS |
+--------+-------+-----+------+---------+--------+--------------+-------------------------+---------------+-----------------+---------------+--------------+

+-----------------------------------------------------------------------------+
| Output Pins                                                                 |
+-----------------------------------------------------------------------------+
+---------------+-------+-----+------+--------------+--------------------------+---------------+----------------+-----------------+---------------+---------------+------------+--------------+
| Name          | Pin # | Row | Col. | I/O Register | Use Local Routing Output | Power Up High | Slow Slew Rate | PCI I/O Enabled | Single-Pin OE | Single-Pin CE | Open Drain | I/O Standard |
+---------------+-------+-----+------+--------------+--------------------------+---------------+----------------+-----------------+---------------+---------------+------------+--------------+
| base1_led     | 27    | --  | 21   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| base2_led     | 26    | --  | 23   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| base3_led     | 23    |  C  | --   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| team0_led     | 8     |  A  | --   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| team1_led     | 94    | --  | 19   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| out_led1      | 29    | --  | 19   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| out_led2      | 30    | --  | 18   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| out_led3      | 28    | --  | 20   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| score0_led[7] | 97    | --  | 23   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |
| score0_led[6] | 98    | --  | 24   | no           | no                       | no            | no             | no              | no            | no            | no         | LVTTL/LVCMOS |