hdpdeps.ref

本代码介绍了使用VHDL开发FPGA的一般流程

V1 35
FL E:/lvbin/Freq_counter/bcd2seg_display.vhdl 2006/12/18.22:38:28
EN work/BCD2SEG_DISPLAY FL E:/lvbin/Freq_counter/bcd2seg_display.vhdl \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/BCD2SEG_DISPLAY/BEHAVIORAL FL E:/lvbin/Freq_counter/bcd2seg_display.vhdl \
      EN work/BCD2SEG_DISPLAY
FL E:/lvbin/Freq_counter/gate.vhdl 2006/12/13.18:02:38
EN work/GATE            FL E:/lvbin/Freq_counter/gate.vhdl PB ieee/STD_LOGIC_1164 \
      PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/GATE/BEHAVIORAL FL E:/lvbin/Freq_counter/gate.vhdl EN work/GATE
FL E:/lvbin/Freq_counter/counter10.vhdl 2006/12/18.22:36:48
EN work/COUNTER10       FL E:/lvbin/Freq_counter/counter10.vhdl \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/COUNTER10/BEHAVIORAL FL E:/lvbin/Freq_counter/counter10.vhdl \
      EN work/COUNTER10
FL E:/lvbin/Freq_counter/freq_change.vhdl 2006/12/18.22:36:14
EN work/FREQ_CHANGE     FL E:/lvbin/Freq_counter/freq_change.vhdl \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/FREQ_CHANGE/BEHAVIORAL FL E:/lvbin/Freq_counter/freq_change.vhdl \
      EN work/FREQ_CHANGE CP FREE_CHANGE
FL E:/lvbin/Freq_counter/Top.vhdl 2006/12/18.22:39:52
EN work/TOP             FL E:/lvbin/Freq_counter/Top.vhdl PB ieee/STD_LOGIC_1164 \
      PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/TOP/BEHAVIOR    FL E:/lvbin/Freq_counter/Top.vhdl EN work/TOP \
      CP FREQ_CHANGE    CP CONTROL_UNITE  CP GATE           CP COUNTER \
      CP DATA_LOCK      CP BCD2SEG_DISPLAY
FL E:/lvbin/Freq_counter/counter.vhdl 2006/12/18.18:22:18
EN work/COUNTER         FL E:/lvbin/Freq_counter/counter.vhdl \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/COUNTER/BEHAVIORAL FL E:/lvbin/Freq_counter/counter.vhdl EN work/COUNTER \
      CP COUNTER10
FL E:/lvbin/Freq_counter/control_unite.vhdl 2006/12/18.22:37:32
EN work/CONTROL_UNITE   FL E:/lvbin/Freq_counter/control_unite.vhdl \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/CONTROL_UNITE/BEHAVIORAL FL E:/lvbin/Freq_counter/control_unite.vhdl \
      EN work/CONTROL_UNITE
FL E:/lvbin/Freq_counter/free_change.vhdl 2006/12/18.12:53:24
EN work/FREE_CHANGE     FL E:/lvbin/Freq_counter/free_change.vhdl \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/FREE_CHANGE/BEHAVIORAL FL E:/lvbin/Freq_counter/free_change.vhdl \
      EN work/FREE_CHANGE
FL E:/lvbin/Freq_counter/data_lock.vhdl 2006/12/13.17:09:38
EN work/DATA_LOCK       FL E:/lvbin/Freq_counter/data_lock.vhdl \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/DATA_LOCK/BEHAVIORAL FL E:/lvbin/Freq_counter/data_lock.vhdl \
      EN work/DATA_LOCK