hdllib.ref

来自「本代码介绍了使用VHDL开发FPGA的一般流程」· REF 代码 · 共 19 行

AR counter10 behavioral E:/lvbin/Freq_counter/counter10.vhdl sub00/vhpl01
AR freq_change behavioral E:/lvbin/Freq_counter/freq_change.vhdl sub00/vhpl05
AR control_unite behavioral E:/lvbin/Freq_counter/control_unite.vhdl sub00/vhpl07
EN data_lock NULL E:/lvbin/Freq_counter/data_lock.vhdl sub00/vhpl12
EN bcd2seg_display NULL E:/lvbin/Freq_counter/bcd2seg_display.vhdl sub00/vhpl14
EN free_change NULL E:/lvbin/Freq_counter/free_change.vhdl sub00/vhpl02
AR top behavior E:/lvbin/Freq_counter/Top.vhdl sub00/vhpl17
AR bcd2seg_display behavioral E:/lvbin/Freq_counter/bcd2seg_display.vhdl sub00/vhpl15
EN top NULL E:/lvbin/Freq_counter/Top.vhdl sub00/vhpl16
AR counter behavioral E:/lvbin/Freq_counter/counter.vhdl sub00/vhpl11
EN counter NULL E:/lvbin/Freq_counter/counter.vhdl sub00/vhpl10
AR gate behavioral E:/lvbin/Freq_counter/gate.vhdl sub00/vhpl09
AR data_lock behavioral E:/lvbin/Freq_counter/data_lock.vhdl sub00/vhpl13
EN control_unite NULL E:/lvbin/Freq_counter/control_unite.vhdl sub00/vhpl06
EN gate NULL E:/lvbin/Freq_counter/gate.vhdl sub00/vhpl08
EN freq_change NULL E:/lvbin/Freq_counter/freq_change.vhdl sub00/vhpl04
AR free_change behavioral E:/lvbin/Freq_counter/free_change.vhdl sub00/vhpl03
EN counter10 NULL E:/lvbin/Freq_counter/counter10.vhdl sub00/vhpl00