bcd2seg_display.vhdl

本代码介绍了使用VHDL开发FPGA的一般流程

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--  Uncomment the following lines to use the declarations that are
--  provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity BCD2SEG_Display is
	PORT(
		BCD_6,BCD_5,BCD_4,BCD_3,BCD_2,BCD_1	:IN STD_LOGIC_VECTOR(3 downto 0);
		CP,OVER_flow						:IN STD_LOGIC;
		SEG_6,SEG_5,SEG_4,SEG_3,SEG_2,SEG_1	:OUT STD_LOGIC_VECTOR(6 downto 0)
	);
end BCD2SEG_Display;

architecture Behavioral of BCD2SEG_Display is
Signal S		:STD_LOGIC_VECTOR(2 downto 0):="000";	
Signal DB		:STD_LOGIC_VECTOR(3 downto 0);
Signal SEG	:STD_LOGIC_VECTOR(6 downto 0);
Signal hide	:STD_LOGIC;
begin
process(CP)
	begin
	if rising_edge(CP)	then				
		if(S<5)	then
			S<=S+1;
		else	S<="000";
		end if;
	end if;
end process;

 DB<=BCD_6 	when S=0	ELSE					
	BCD_5 	when S=1	ELSE	
	BCD_4 	when S=2	ELSE
	BCD_3 	when S=3	ELSE	
	BCD_2 	when S=4	ELSE
	BCD_1 	when S=5	ELSE	
	"0000";	

SEG<="0000000"		when hide='1'	ELSE
	"1111110"		when DB=0		ELSE    
    	"0110000"		when DB=1		ELSE	   
	"1101101"		when DB=2		ELSE	   
	"1111001"		when DB=3		ELSE	   
	"0110011"		when DB=4		ELSE	   
	"1011011"		when DB=5		ELSE	    
	"1011111"		when DB=6		ELSE	    
	"1110000"		when DB=7		ELSE	    
	"1111111"		when DB=8		ELSE	    
	"1111011"		when DB=9		ELSE	    
	"0000001";              --中间显示，表示出错

	  	
hide<='0'	     when OVER_flow='0'										ELSE
	 '1'		when BCD_6="0000" and S=0								ELSE
	 '1'		when (BCD_6 or BCD_5)="0000" and  S=1						ELSE
	 '1'		when (BCD_6 or BCD_5 or BCD_4)="0000" and  S=2				ELSE
	 '1'		when (BCD_6 or BCD_5 or BCD_4 or BCD_3)="0000" and  S=3		ELSE
	 '1'		when (BCD_6 or BCD_5 or BCD_4 or BCD_3 or BCD_2)="0000" and  S=4	ELSE
	 '0';
	 			
SEG_6<=not SEG 	when S=0	ELSE	  "1111111";				
SEG_5<=not SEG 	when S=1	ELSE	  "1111111";
SEG_4<=not SEG 	when S=2	ELSE	  "1111111";
SEG_3<=not SEG 	when S=3	ELSE	  "1111111";	
SEG_2<=not SEG 	when S=4	ELSE	  "1111111";
SEG_1<=not SEG 	when S=5	ELSE	  "1111111";	

	
end Behavioral;