system1.map.qmsg

用VHDL语言实现的控制DS18B20构成测温仪表的程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 27 10:23:40 2006 " "Info: Processing started: Fri Oct 27 10:23:40 2006" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off system1 -c system1 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off system1 -c system1" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "convertor.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file convertor.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 convertor-rtl " "Info: Found design unit 1: convertor-rtl" {  } { { "convertor.vhd" "" { Text "D:/altera/my vhdl file/system1/convertor.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 convertor " "Info: Found entity 1: convertor" {  } { { "convertor.vhd" "" { Text "D:/altera/my vhdl file/system1/convertor.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "led_convertor.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file led_convertor.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 led_convertor-rtl " "Info: Found design unit 1: led_convertor-rtl" {  } { { "led_convertor.vhd" "" { Text "D:/altera/my vhdl file/system1/led_convertor.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 led_convertor " "Info: Found entity 1: led_convertor" {  } { { "led_convertor.vhd" "" { Text "D:/altera/my vhdl file/system1/led_convertor.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "system1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file system1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 system1-rtl " "Info: Found design unit 1: system1-rtl" {  } { { "system1.vhd" "" { Text "D:/altera/my vhdl file/system1/system1.vhd" 14 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 system1 " "Info: Found entity 1: system1" {  } { { "system1.vhd" "" { Text "D:/altera/my vhdl file/system1/system1.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "system1 " "Info: Elaborating entity \"system1\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../quartus51/libraries/megafunctions/lpm_bustri.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../../quartus51/libraries/megafunctions/lpm_bustri.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_bustri " "Info: Found entity 1: lpm_bustri" {  } { { "lpm_bustri.tdf" "" { Text "d:/altera/quartus51/libraries/megafunctions/lpm_bustri.tdf" 29 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_bustri lpm_bustri:lpm_bustri_component " "Info: Elaborating entity \"lpm_bustri\" for hierarchy \"lpm_bustri:lpm_bustri_component\"" {  } { { "system1.vhd" "lpm_bustri_component" { Text "D:/altera/my vhdl file/system1/system1.vhd" 63 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "led_convertor led_convertor:display_component " "Info: Elaborating entity \"led_convertor\" for hierarchy \"led_convertor:display_component\"" {  } { { "system1.vhd" "display_component" { Text "D:/altera/my vhdl file/system1/system1.vhd" 77 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}