system1.smp_dump.txt

来自「用VHDL语言实现的控制DS18B20构成测温仪表的程序」· 文本 代码 · 共 40 行

State Machine - |system1|allstate
Name allstate.display allstate.rstop allstate.rwait_55u allstate.rwait_9u allstate.rwait_6u allstate.rmaster allstate.wstop2 allstate.wait2_10u allstate.write2_0 allstate.wait2_64u allstate.write2_1 allstate.wmaster2 allstate.tempstay_750m allstate.wstop1 allstate.wait1_10u allstate.write1_0 allstate.wait1_64u allstate.write1_1 allstate.wmaster1 allstate.reset_jump allstate.wait_410u allstate.wait_70u allstate.wait_480u allstate.resetstart 
allstate.resetstart 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
allstate.wait_480u 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 
allstate.wait_70u 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 
allstate.wait_410u 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 
allstate.reset_jump 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 
allstate.wmaster1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 
allstate.write1_1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 
allstate.wait1_64u 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 
allstate.write1_0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 
allstate.wait1_10u 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 
allstate.wstop1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 
allstate.tempstay_750m 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 
allstate.wmaster2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.write2_1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.wait2_64u 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.write2_0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.wait2_10u 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.wstop2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.rmaster 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.rwait_6u 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.rwait_9u 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.rwait_55u 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.rstop 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
allstate.display 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |system1|led_convertor:display_component|fsm3
Name state_6 state_4 state_1 
state_1 0 0 0 
state_4 0 1 1 
state_6 1 0 1 

State Machine - |system1|led_convertor:display_component|state
Name state.display state.enable state.clear 
state.clear 0 0 0 
state.enable 0 1 1 
state.display 1 0 1