system1.tan.rpt

用VHDL语言实现的控制DS18B20构成测温仪表的程序

+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EPF10K10LC84-4     ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same As Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clock           ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clock'                                                                                                                                                                                                                                                                                                                      ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                          ; To                                                            ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------+---------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 15.38 MHz ( period = 65.000 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[0] ; led_convertor:display_component|convertor:my_convert|b6[1]    ; clock      ; clock    ; None                        ; None                      ; 60.500 ns               ;
; N/A                                     ; 15.53 MHz ( period = 64.400 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[1] ; led_convertor:display_component|convertor:my_convert|b6[1]    ; clock      ; clock    ; None                        ; None                      ; 60.000 ns               ;
; N/A                                     ; 15.75 MHz ( period = 63.500 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[0] ; led_convertor:display_component|convertor:my_convert|temp6[2] ; clock      ; clock    ; None                        ; None                      ; 58.800 ns               ;
; N/A                                     ; 15.75 MHz ( period = 63.500 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[0] ; led_convertor:display_component|convertor:my_convert|b6[2]    ; clock      ; clock    ; None                        ; None                      ; 58.800 ns               ;
; N/A                                     ; 15.80 MHz ( period = 63.300 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[0] ; led_convertor:display_component|convertor:my_convert|temp6[4] ; clock      ; clock    ; None                        ; None                      ; 58.800 ns               ;
; N/A                                     ; 15.90 MHz ( period = 62.900 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[1] ; led_convertor:display_component|convertor:my_convert|temp6[2] ; clock      ; clock    ; None                        ; None                      ; 58.300 ns               ;
; N/A                                     ; 15.90 MHz ( period = 62.900 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[1] ; led_convertor:display_component|convertor:my_convert|b6[2]    ; clock      ; clock    ; None                        ; None                      ; 58.300 ns               ;
; N/A                                     ; 15.90 MHz ( period = 62.900 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[2] ; led_convertor:display_component|convertor:my_convert|b6[1]    ; clock      ; clock    ; None                        ; None                      ; 58.400 ns               ;
; N/A                                     ; 15.95 MHz ( period = 62.700 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[1] ; led_convertor:display_component|convertor:my_convert|temp6[4] ; clock      ; clock    ; None                        ; None                      ; 58.300 ns               ;
; N/A                                     ; 15.95 MHz ( period = 62.700 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[0] ; led_convertor:display_component|convertor:my_convert|temp6[3] ; clock      ; clock    ; None                        ; None                      ; 59.100 ns               ;
; N/A                                     ; 15.95 MHz ( period = 62.700 ns )                    ; led_convertor:display_component|convertor:my_convert|temp5[0] ; led_convertor:display_component|convertor:my_convert|b6[3]    ; clock      ; clock    ; None                        ; None                      ; 59.100 ns               ;