nand256r3a.v

256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual

        not_blank = 1'b0;
        REG_STAT[0] = 1'b1;
        $display("\n%t, Error: the bytes addressed to program are not blank, a Block Erase Command must be issued before copy back program!\n",$realtime);
      end
      else if(not_blank == 1'b0)  //the page is blank, copy program
      begin
        programming2 <= 1'b1;
        for(addr_temp1 = 0 ; addr_temp1 < `COL_IN_PAGE ; addr_temp1 = addr_temp1 + 1)
        begin
            //$display("source[%d],target[%d]",{address_tgt[`CHP_BIT-1:10],addr_temp1[`COL_BIT-1:0]}
            //- {address_tgt[`CHP_BIT-1:10]}*(1024-`COL_IN_PAGE),{address_src[`CHP_BIT-1:10],addr_temp1[`COL_BIT-1:0]}
            //- {address_src[`CHP_BIT-1:10]}*(1024-`COL_IN_PAGE));
            MEMORY[{address_tgt[`CHP_BIT-1:10],addr_temp1[`COL_BIT-1:0]}
            - {address_tgt[`CHP_BIT-1:10]}*(1024-`COL_IN_PAGE)] <= #(`tWB + `tPROG)
            MEMORY[{address_src[`CHP_BIT-1:10],addr_temp1[`COL_BIT-1:0]}
            - {address_src[`CHP_BIT-1:10]}*(1024-`COL_IN_PAGE)];
        end
      end
    end
    if(COPYBACK_ID2 === 1'b1 && address_src[`CHP_BIT-1] !== address_tgt[`CHP_BIT-1])
      $display("\n%t, Error: The most significant address bit must be the same for source and target!\n",$realtime);
  end
  else if(wr_protect == 1'b1)
  begin
    //wr_protect <= 1'b0;
    //REG_STAT[7] <= 1'b1;
    case(COPYBACK_ID2)
      0: $display("\n%t, Error: Write Protect, the Program Operation is not accepted!\n",$realtime);
      1: $display("\n%t, Error: Write Protect, the Copy Back Program Operation is not accepted!\n",$realtime);
    endcase
  end
end
//-----------------------------------------------
always@(posedge BUSY_BY_PG)
begin
  if(programming1 == 1'b1) begin
    $display("\n%t, Note: Block[%d] Page[%d] Program Operation is completed!\n",$realtime,addr_block,addr_page);
    programming1 <= 1'b0;
  end
  if(programming2 == 1'b1) begin
    $display("\n%t, Note: Copy Back Program Operation is completed!",$realtime);
    $display("%t, Block[%d] Page[%d] to Block[%d] Page[%d]\n",$realtime,
    address_src[`CHP_BIT-1:`CHP_BIT-`BLK_BIT],address_src[`CHP_BIT-1-`BLK_BIT:`CHP_BIT-`BLK_BIT-`PAG_BIT],
    address_tgt[`CHP_BIT-1:`CHP_BIT-`BLK_BIT],address_tgt[`CHP_BIT-1-`BLK_BIT:`CHP_BIT-`BLK_BIT-`PAG_BIT]);
    programming2 <= 1'b0;
  end
  COPYBACK_ID2 <= 1'b0;
end  

//===================================================================
always@(posedge iCE)
begin
  if(oRY_BY && ( bCE == 1'b0 )) begin
    $display("%t, Note: Chip Select is high, the memory enters Standby mode!\n",$realtime);
    if(MOD_READ_ES && OP_READ)   dout <= #(`tCHZ) 8'hzz;
    if(MOD_READ_SR && OP_READ)   dout <= #(`tCHZ) 8'hzz;
    if(MOD_READ_MODE && OP_READ) dout <= #(`tCHZ) 8'hzz;
  end
  else if(!oRY_BY && ( bCE == 1'b0 )) begin
    if(MOD_READ_MODE && OP_READ)
    begin
      BUSY_BY_RD <= #(`tCRY) 1'b1;
      $display("%t, Note: Chip Select does high during device BUSY, Read Operation is aborted!\n",$realtime);
    end
  end
end
//-------------------------------------------------------------------
always@(negedge iCE)
begin
  if(power_on && MOD_READ_SR)
  begin
    operation <= OP_READ;
    eIO <= #(`tCEA) 1'b1;      //#(`tCEA): chip enable low to output valid
    dout <= #(`tCEA) REG_STAT;
  end
  if(power_on && (operation == OP_READ) && MOD_READ_MODE && ($time - tr_iCE >= `tEHEL)) 
  begin
    //reset <= 1'b1;
    $display("%t, Note: Sequential Read Operation is terminated!\n",$realtime);
  end
end

//=============================================================================
//  CHECKING COMMANDS
//-----------------------------------------------------------------------------
//  returns '1' in case of valid command
//  returns '0' in case of invalid command.
//=============================================================================
function CMD_CHECK;
input[`D_WIDTH-1:0] CMD_NEW;
begin
  case(CMD_NEW)
  //---------------------------------------------------------------------------------------------------------
    CMD_READ_SR:       CMD_CHECK = 1'b1;
  //---------------------------------------------------------------------------------------------------------
    CMD_RESET  :       CMD_CHECK = 1'b1;
  //---------------------------------------------------------------------------------------------------------
    CMD_READ_A :
      if(oRY_BY) begin CMD_CHECK = 1'b1; add_cycle = 3; end
      else begin
        $display("%t, Error: Device is Busy,Read Area A Command is Rejected!\n",$realtime);
        CMD_CHECK = 1'b0;
      end
  //---------------------------------------------------------------------------------------------------------
    CMD_READ_B :
      if(oRY_BY) begin CMD_CHECK = 1'b1; add_cycle = 3; end
      else begin
        $display("%t, Error: Device is Busy,Read Area B Command is Rejected!\n",$realtime);
        CMD_CHECK = 1'b0;
      end
  //---------------------------------------------------------------------------------------------------------
    CMD_READ_C :
      if(oRY_BY) begin CMD_CHECK = 1'b1; add_cycle = 3; end
      else begin
        $display("%t, Error: Device is Busy,Read Area C Command is Rejected!\n",$realtime);
        CMD_CHECK = 1'b0;
      end
  //---------------------------------------------------------------------------------------------------------
    CMD_READ_ES:
      if(oRY_BY) begin CMD_CHECK = 1'b1; add_cycle = 1; end
      else begin
        $display("%t, Error: Device is Busy,Read Electronic Signature Command is Rejected!\n",$realtime);
        CMD_CHECK = 1'b0;
      end
  //---------------------------------------------------------------------------------------------------------
    CMD_BLOCK_ERASE_1:
      if(oRY_BY) begin CMD_CHECK = 1'b1; add_cycle = 2; end
      else begin
        $display("%t, Error: Device is Busy,Block Erase Command is Rejected!\n",$realtime);
        CMD_CHECK = 1'b0;
      end
  //---------------------------------------------------------------------------------------------------------
    CMD_PAGE_PROGRAM_1:
      if(MOD_READ_MODE || (MOD_PAGE_PROGRAM_2 && (area_a == 1'b1 || area_c == 1'b1)))
        if(oRY_BY) begin CMD_CHECK = 1'b1; add_cycle = 3; end
        else begin
          $display("%t, Error: Device is Busy,Page Program Command is Rejected!\n",$realtime);
          CMD_CHECK = 1'b0;
        end
      else $display("%t, Error: Incorrect Program Command Sequence!\n",$realtime);
  //---------------------------------------------------------------------------------------------------------
    CMD_COPY_BACK_PG:
      if(MOD_READ_A && COPYBACK_ID1)
        if(oRY_BY) begin CMD_CHECK = 1'b1; add_cycle = 3; end
        else begin
          $display("%t, Error: Device is Busy,Copy Back Program Command is Rejected!\n",$realtime);
          CMD_CHECK = 1'b0;
        end
      else $display("%t, Error: Incorrect Copy Back Program Command Sequence!\n",$realtime);
  //---------------------------------------------------------------------------------------------------------
    CMD_BLOCK_ERASE_2:
      if(MOD_BLOCK_ERASE_1) CMD_CHECK = ( oRY_BY ) ? 1'b1 : 1'b0;
      else $display("%t, Error: Incorrect Block Erase Command Sequence!\n",$realtime);
  //---------------------------------------------------------------------------------------------------------
    CMD_PAGE_PROGRAM_2:
      if(MOD_COPY_BACK_PG || MOD_PAGE_PROGRAM_1) CMD_CHECK = ( oRY_BY ) ? 1'b1 : 1'b0;
      else $display("%t, Error: Incorrect Page Program or Copy Back Program Command Sequence!\n",$realtime);
  //---------------------------------------------------------------------------------------------------------
    default:
    begin
      CMD_CHECK = 1'b0;
      $display("%t, Error: An Unkown Command Code(%h)H is Latched!\n",$realtime,CMD_NEW);
    end
  //---------------------------------------------------------------------------------------------------------
  endcase
end
endfunction
//-----------------------------------------------------------------------------------------------------------

//===================================================================
//          CHECKING INPUT SIGNAL AC TIMING CHARACTERISTICS
//===================================================================
always@(posedge iWE)
begin
  tr_iWE <= $time;
  iWE_R <= 1'b1;
  if(iIO_C === 1'b1)
  begin
    //iIO_C <= 1'b0;
    if($time - tc_iIO < `tDVWH) $display("%t, Error: Data Setup Time(tDS) violated.\n",$realtime);
  end
  if(iWE_F === 1'b1)
  begin
    //iWE_F <= 1'b0;
    if($time - tf_iWE < `tWLWH) $display("%t, Error: /W Pulse Width(tWP) violated.\n",$realtime);
  end
end
//-------------------------------------------------------------------
always@(negedge iWE)
begin
  tf_iWE <= $time;
  iWE_F <= 1'b1;
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHWL) $display("%t, Error: /W High Hold Time(tWH) violated.\n",$realtime);
  end
  if(iWE_F === 1'b1)
  begin
    //iWE_F <= 1'b0;
    if($time - tf_iWE < `tWLWL) $display("%t, Error: Write Cycle Time(tWC) violated.\n",$realtime);
  end
  if(iCE_F === 1'b1)
  begin
    //iCE_F <= 1'b0;
    if($time - tf_iCE < `tELWL) $display("%t, Error: /E Setup Time(tCS) violated.\n",$realtime);
  end
  if(iCLE_R === 1'b1)
  begin
    //iCLE_R <= 1'b0;
    if($time - tr_iCLE < `tCLHWL) $display("%t, Error: CL Setup Time(tCLS) violated.\n",$realtime);
  end
  if(iCLE_F === 1'b1)
  begin
    //iCLE_F <= 1'b0;
    if($time - tf_iCLE < `tCLLWL) $display("%t, Error: CL Setup Time(tCLS) violated.\n",$realtime);
  end
  if(iALE_R === 1'b1)
  begin
    //iALE_R <= 1'b0)
    if($time - tr_iALE < `tALHWL) $display("%t, Error: AL Setup Time(tALS) violated.\n",$realtime);
  end
  if(iALE_F === 1'b1)
  begin
    //iALE_F <= 1'b0;
    if($time - tf_iALE < `tALLWL) $display("%t, Error: AL Setup Time(tALS) violated.\n",$realtime);
  end
end
//===================================================================
always@(posedge iRE)
begin
  tr_iRE <= $time;
  iRE_R <= 1'b1;
  if(iRE_F === 1'b1)
  begin
    //iRE_F <= 1'b0;
    if($time - tf_iRE < `tRLRH) $display("%t, Error: Read Enable Pulse Width(tRP) violated.\n",$realtime);
  end
end
//-------------------------------------------------------------------
always@(negedge iRE)
begin
  tf_iRE <= $time;
  iRE_F <= 1'b1;
  if(iALE_F === 1'b1)
  begin
    //iALE_F <= 1'b0;
    if($time - tf_iALE < `tALLRL) $display("%t, Error: Address Latch Low to Read Enable Low(tAR) violated.\n",$realtime);
  end
  if(iCLE_F === 1'b1)
  begin
    //iCLE_F <= 1'b0;
    if($time - tf_iCLE < `tCLLRL) $display("%t, Error: Command Latch Low to Read Enable Low(tCLR) violated.\n",$realtime);
  end
  if(iRE_F === 1'b1)
  begin
    //iRE_F <= 1'b0;
    if($time - tf_iRE < `tRLRL) $display("%t, Error: Read Cycle Time(tRC) violated.\n",$realtime);
  end
  if(iRE_R === 1'b1)
  begin
    //iRE_R <= 1'b0;
    if($time - tr_iRE < `tRHRL) $display("%t, Error: Read Enable High Hold Time(tREH) violated.\n",$realtime);
  end
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHRL) $display("%t, Error: Write Enable High to Read Enable Low(tWHR) violated.\n",$realtime);
  end
end
//===================================================================
always@(posedge iALE)
begin
  tr_iALE <= $time;
  iALE_R <= 1'b1;
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHALH) $display("%t, Error: AL Hold Time(tALH) violated.\n",$realtime);
  end
end
//-------------------------------------------------------------------
always@(negedge iALE)
begin
  tf_iALE <= $time;
  iALE_F <= 1'b1;
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHALL) $display("%t, Error: AL Hold Time(tALH) violated.\n",$realtime);
  end
end
//===================================================================
always@(posedge iCLE)
begin
  tr_iCLE <= $time;
  iCLE_R <= 1'b1;
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHCLH) $display("%t, Error: CL Hold Time(tCLH) violated.\n",$realtime);
  end
end
//-------------------------------------------------------------------
always@(negedge iCLE)
begin
  tf_iCLE <= $time;
  iCLE_F <= 1'b1;
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHCLL) $display("%t, Error: CL Hold Time(tCLH) violated.\n",$realtime);
  end
end
//===================================================================
always@(posedge iCE)
begin
  tr_iCE <= $time;
  iCE_R <= 1'b1;
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHEH) $display("%t, Error: /E Hold Time(tCH) violated.\n",$realtime);
  end
end
//-------------------------------------------------------------------
always@(negedge iCE)
begin
  tf_iCE <= $time;
  iCE_F <= 1'b1;
  if(iCE_R === 1'b1)
  begin
    //iCE_R <= 1'b0;
    if($time - tr_iCE < `tEHEL) $display("%t, Error: Chip Enable High to Chip Enable Low(tEHEL) violated.\n",$realtime);
  end
end
//===================================================================
always@(iIO)
begin
  tc_iIO <= $time;
  iIO_C <= 1'b1;
  if(iWE_R === 1'b1)
  begin
    //iWE_R <= 1'b0;
    if($time - tr_iWE < `tWHDX) $display("%t, Error: Data Hold Time(tDH) violated.\n",$realtime);
  end
end
//###################################################################

endmodule