isim.hdlsourcefiles

本程序以XILINX公司的ISE８.２为开发平台

J:/I.31/rtf/verilog/src/simprims/X_ZERO.v
J:/I.31/rtf/verilog/src/simprims/X_CKBUF.v
J:/I.31/rtf/verilog/src/simprims/X_SFF.v
J:/I.31/rtf/verilog/src/simprims/X_INV.v
J:/I.31/rtf/verilog/src/simprims/X_FF.v
J:/I.31/rtf/verilog/src/simprims/X_LUT4.v
J:/I.31/rtf/verilog/src/simprims/X_IPAD.v
J:/I.31/rtf/verilog/src/simprims/X_BUF.v
J:/I.31/rtf/verilog/src/simprims/X_OBUF.v
J:/I.31/rtf/verilog/src/simprims/X_OPAD.v
J:/I.31/rtf/verilog/src/simprims/X_ONE.v
D:/MY_DESIGN/ISE/LXJ/ClockDiv/netgen/par/ClockDiv_timesim.v
C:/Xilinx/verilog/src/glbl.v
D:/MY_DESIGN/ISE/LXJ/ClockDiv/ClockDiv_tbw.vhw