transcript

CCD信号由于其特殊性,一般不能有信号源产生,本程序采用VHDL语言

# Reading C:/Modeltech_6.2b/tcl/vsim/pref.tcl 
# //  ModelSim SE 6.2b Jul 31 2006 
# //
# //  Copyright 2006 Mentor Graphics Corporation
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
# do CCDOUT_tbw.fdo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vcom 6.2b Compiler 2006.07 Jul 31 2006
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity ccdout
# -- Compiling architecture behavioral of ccdout
# Model Technology ModelSim SE vcom 6.2b Compiler 2006.07 Jul 31 2006
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading package textio
# -- Loading package std_logic_textio
# -- Compiling entity ccdout_tbw
# -- Compiling architecture testbench_arch of ccdout_tbw
# vsim -lib work -t 1ps CCDOUT_tbw 
# ** Note: (vsim-3813) Design is being optimized due to module recompilation...
# Loading C:\Modeltech_6.2b\win32/../std.standard
# Loading C:\Modeltech_6.2b\win32/../ieee.std_logic_1164(body)
# Loading C:\Modeltech_6.2b\win32/../ieee.std_logic_arith(body)
# Loading C:\Modeltech_6.2b\win32/../ieee.std_logic_unsigned(body)
# Loading C:\Modeltech_6.2b\win32/../std.textio(body)
# Loading C:\Modeltech_6.2b\win32/../ieee.std_logic_textio(body)
# Loading work.ccdout_tbw(testbench_arch)
# Loading work.ccdout(behavioral)
# .main_pane.mdi.interior.cs.vm.paneset.cli_0.wf.clip.cs.pw.wf
# .main_pane.workspace.interior.cs.nb.canvas.notebook.cs.page2.cs
# .main_pane.signals.interior.cs
# ** Failure: Simulation successful (not a failure).  No problems detected.
#    Time: 3100 ns  Iteration: 0  Process: /ccdout_tbw/line__72 File: CCDOUT_tbw.vhw
# Break in Process line__72 at CCDOUT_tbw.vhw line 213
# Simulation Breakpoint: Break in Process line__72 at CCDOUT_tbw.vhw line 213
# MACRO ./CCDOUT_tbw.fdo PAUSED at line 13
run -all
# ** Error: Error at time=355ns Date_out=1010, Expected = 1011 
#    Time: 3455 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=455ns Date_out=0011, Expected = 1010 
#    Time: 3555 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=555ns Date_out=1011, Expected = 1001 
#    Time: 3655 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=655ns Date_out=1010, Expected = 1011 
#    Time: 3755 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=755ns Date_out=0000, Expected = 1010 
#    Time: 3855 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=855ns Date_out=1011, Expected = 0110 
#    Time: 3955 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=955ns Date_out=1010, Expected = 1011 
#    Time: 4055 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1055ns Date_out=1001, Expected = 1010 
#    Time: 4155 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1155ns Date_out=1011, Expected = 0011 
#    Time: 4255 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1255ns Date_out=1010, Expected = 1011 
#    Time: 4355 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1355ns Date_out=0110, Expected = 1010 
#    Time: 4455 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1455ns Date_out=1011, Expected = 0000 
#    Time: 4555 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1555ns Date_out=1010, Expected = 1011 
#    Time: 4655 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1655ns Date_out=0011, Expected = 1010 
#    Time: 4755 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1755ns Date_out=1011, Expected = 1001 
#    Time: 4855 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1855ns Date_out=1010, Expected = 1011 
#    Time: 4955 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=1955ns Date_out=0000, Expected = 1010 
#    Time: 5055 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2055ns Date_out=1011, Expected = 0110 
#    Time: 5155 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2155ns Date_out=1010, Expected = 1011 
#    Time: 5255 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2255ns Date_out=1001, Expected = 1010 
#    Time: 5355 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2355ns Date_out=1011, Expected = 0011 
#    Time: 5455 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2455ns Date_out=1010, Expected = 1011 
#    Time: 5555 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2555ns Date_out=0110, Expected = 1010 
#    Time: 5655 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2655ns Date_out=1011, Expected = 0000 
#    Time: 5755 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2755ns Date_out=1010, Expected = 1011 
#    Time: 5855 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2855ns Date_out=0011, Expected = 1010 
#    Time: 5955 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Error: Error at time=2955ns Date_out=1011, Expected = 1001 
#    Time: 6055 ns  Iteration: 0  Instance: /ccdout_tbw
# ** Failure: Errors found during simulation
#    Time: 6200 ns  Iteration: 0  Process: /ccdout_tbw/line__72 File: CCDOUT_tbw.vhw
# Break in Process line__72 at CCDOUT_tbw.vhw line 220
# Simulation Breakpoint: Break in Process line__72 at CCDOUT_tbw.vhw line 220
# MACRO ./CCDOUT_tbw.fdo PAUSED at line 13