ccdout.fdo

CCD信号由于其特殊性,一般不能有信号源产生,本程序采用VHDL语言

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Mon Apr 30 9:04:57 涓?鍥芥爣鍑嗘椂闂? 2007
##
vlib work
vcom -explicit  -93 "CCDOUT.vhd"
vsim -t 1ps   -lib work CCDOUT
do {CCDOUT.udo}
view wave
add wave *
view structure
view signals
run 1000ns