singt3.fit.qmsg

来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· QMSG 代码 · 共 38 行 · 第 1/2 页

{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "8 unused 3.30 0 8 0 " "Info: Number of I/O pins in group: 8 (unused VREF, 3.30 VCCIO, 0 input, 8 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 3 19 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 3 total pin(s) used --  19 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 28 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  28 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use unused 0 26 " "Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  26 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 0 28 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  28 pins available" {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "2.954 ns register register " "Info: Estimated most critical path is register to register delay of 2.954 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns q\[0\] 1 REG LAB_X5_Y2 44 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X5_Y2; Fanout = 44; REG Node = 'q\[0\]'" {  } { { "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" "" { Report "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" Compiler "singt3" "UNKNOWN" "V1" "E:/EDA/DDS/1c3t/cosx/db/singt3.quartus_db" { Floorplan "E:/EDA/DDS/1c3t/cosx/" "" "" { q[0] } "NODE_NAME" } "" } } { "singt3.vhd" "" { Text "E:/EDA/DDS/1c3t/cosx/singt3.vhd" 12 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.151 ns) + CELL(0.590 ns) 0.741 ns Mux~2537 2 COMB LAB_X5_Y2 3 " "Info: 2: + IC(0.151 ns) + CELL(0.590 ns) = 0.741 ns; Loc. = LAB_X5_Y2; Fanout = 3; COMB Node = 'Mux~2537'" {  } { { "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" "" { Report "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" Compiler "singt3" "UNKNOWN" "V1" "E:/EDA/DDS/1c3t/cosx/db/singt3.quartus_db" { Floorplan "E:/EDA/DDS/1c3t/cosx/" "" "0.741 ns" { q[0] Mux~2537 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.551 ns) + CELL(0.114 ns) 1.406 ns LessThan~75 3 COMB LAB_X5_Y2 7 " "Info: 3: + IC(0.551 ns) + CELL(0.114 ns) = 1.406 ns; Loc. = LAB_X5_Y2; Fanout = 7; COMB Node = 'LessThan~75'" {  } { { "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" "" { Report "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" Compiler "singt3" "UNKNOWN" "V1" "E:/EDA/DDS/1c3t/cosx/db/singt3.quartus_db" { Floorplan "E:/EDA/DDS/1c3t/cosx/" "" "0.665 ns" { Mux~2537 LessThan~75 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.436 ns) + CELL(1.112 ns) 2.954 ns q\[0\] 4 REG LAB_X5_Y2 44 " "Info: 4: + IC(0.436 ns) + CELL(1.112 ns) = 2.954 ns; Loc. = LAB_X5_Y2; Fanout = 44; REG Node = 'q\[0\]'" {  } { { "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" "" { Report "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" Compiler "singt3" "UNKNOWN" "V1" "E:/EDA/DDS/1c3t/cosx/db/singt3.quartus_db" { Floorplan "E:/EDA/DDS/1c3t/cosx/" "" "1.548 ns" { LessThan~75 q[0] } "NODE_NAME" } "" } } { "singt3.vhd" "" { Text "E:/EDA/DDS/1c3t/cosx/singt3.vhd" 12 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.816 ns 61.48 % " "Info: Total cell delay = 1.816 ns ( 61.48 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.138 ns 38.52 % " "Info: Total interconnect delay = 1.138 ns ( 38.52 % )" {  } {  } 0}  } { { "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" "" { Report "E:/EDA/DDS/1c3t/cosx/db/singt3_cmp.qrpt" Compiler "singt3" "UNKNOWN" "V1" "E:/EDA/DDS/1c3t/cosx/db/singt3.quartus_db" { Floorplan "E:/EDA/DDS/1c3t/cosx/" "" "2.954 ns" { q[0] Mux~2537 LessThan~75 q[0] } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Apr 14 19:22:00 2006 " "Info: Processing ended: Fri Apr 14 19:22:00 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:18 " "Info: Elapsed time: 00:00:18" {  } {  } 0}  } {  } 0}