data_rom.fit.qmsg

来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· QMSG 代码 · 共 45 行 · 第 1/3 页

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "3.734 ns register register " "Info: Estimated most critical path is register to register delay of 3.734 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[2\] 1 REG LAB_X11_Y7 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X11_Y7; Fanout = 4; REG Node = 'sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[2\]'" {  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[2] } "NODE_NAME" } "" } } { "sld_dffex.vhd" "" { Text "c:/altera/quartus42/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.033 ns) + CELL(0.442 ns) 1.475 ns sld_hub:sld_hub_inst\|HUB_TDO~358 2 COMB LAB_X11_Y9 1 " "Info: 2: + IC(1.033 ns) + CELL(0.442 ns) = 1.475 ns; Loc. = LAB_X11_Y9; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~358'" {  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "1.475 ns" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[2] sld_hub:sld_hub_inst|HUB_TDO~358 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus42/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.957 ns) + CELL(0.442 ns) 2.874 ns sld_hub:sld_hub_inst\|HUB_TDO~356 3 COMB LAB_X10_Y7 1 " "Info: 3: + IC(0.957 ns) + CELL(0.442 ns) = 2.874 ns; Loc. = LAB_X10_Y7; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~356'" {  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "1.399 ns" { sld_hub:sld_hub_inst|HUB_TDO~358 sld_hub:sld_hub_inst|HUB_TDO~356 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus42/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.551 ns) + CELL(0.309 ns) 3.734 ns sld_hub:sld_hub_inst\|HUB_TDO~reg0 4 REG LAB_X10_Y7 0 " "Info: 4: + IC(0.551 ns) + CELL(0.309 ns) = 3.734 ns; Loc. = LAB_X10_Y7; Fanout = 0; REG Node = 'sld_hub:sld_hub_inst\|HUB_TDO~reg0'" {  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "0.860 ns" { sld_hub:sld_hub_inst|HUB_TDO~356 sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } "" } } { "sld_hub.vhd" "" { Text "c:/altera/quartus42/libraries/megafunctions/sld_hub.vhd" 937 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.193 ns 31.95 % " "Info: Total cell delay = 1.193 ns ( 31.95 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.541 ns 68.05 % " "Info: Total interconnect delay = 2.541 ns ( 68.05 % )" {  } {  } 0}  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "3.734 ns" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[2] sld_hub:sld_hub_inst|HUB_TDO~358 sld_hub:sld_hub_inst|HUB_TDO~356 sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_PLACER_ESTIMATED_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Info: Estimated interconnect usage is 2% of the available device resources" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "2 " "Info: Fitter placement operations ending: elapsed time = 2 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "1 " "Info: Fitter routing operations ending: elapsed time = 1 seconds" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\] " "Info: Node sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\] uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear altsyncram:altsyncram_component\|altsyncram_kds:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ir_loaded_address_reg\[3\] " "Info: Port clear -- assigned as a global for destination node altsyncram:altsyncram_component\|altsyncram_kds:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ir_loaded_address_reg\[3\] -- routed using non-global resources" {  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "" { altsyncram:altsyncram_component|altsyncram_kds:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "altsyncram:altsyncram_component\|altsyncram_kds:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ir_loaded_address_reg\[3\]" } } } } { "sld_mod_ram_rom.vhd" "" { Text "c:/altera/quartus42/libraries/megafunctions/sld_mod_ram_rom.vhd" 591 -1 0 } } { "D:/DDS/cosx/data_rom.fld" "" { Floorplan "D:/DDS/cosx/data_rom.fld" "" "" { altsyncram:altsyncram_component|altsyncram_kds:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear altsyncram:altsyncram_component\|altsyncram_kds:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ir_loaded_address_reg\[2\] " "Info: Port clear -- assigned as a global for destination node altsyncram:altsyncram_component\|altsyncram_kds:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ir_loaded_address_reg\[2\] -- routed using non-global resources" {  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "" { altsyncram:altsyncram_component|altsyncram_kds:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "altsyncram:altsyncram_component\|altsyncram_kds:auto_generated\|sld_mod_ram_rom:mgl_prim2\|ir_loaded_address_reg\[2\]" } } } } { "sld_mod_ram_rom.vhd" "" { Text "c:/altera/quartus42/libraries/megafunctions/sld_mod_ram_rom.vhd" 591 -1 0 } } { "D:/DDS/cosx/data_rom.fld" "" { Floorplan "D:/DDS/cosx/data_rom.fld" "" "" { altsyncram:altsyncram_component|altsyncram_kds:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[2] } "NODE_NAME" } }  } 0}  } { { "D:/DDS/cosx/db/data_rom_cmp.qrpt" "" { Report "D:/DDS/cosx/db/data_rom_cmp.qrpt" Compiler "data_rom" "UNKNOWN" "V1" "D:/DDS/cosx/db/data_rom.quartus_db" { Floorplan "D:/DDS/cosx/" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] } "NODE_NAME" } "" } } { "c:/altera/quartus42/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus42/bin/Assignment Editor.qase" 1 { { 0 "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\]" } } } } { "sld_dffex.vhd" "" { Text "c:/altera/quartus42/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } } { "D:/DDS/cosx/data_rom.fld" "" { Floorplan "D:/DDS/cosx/data_rom.fld" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] } "NODE_NAME" } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 0 s " "Info: Quartus II Fitter was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 09 16:50:30 2006 " "Info: Processing ended: Sun Apr 09 16:50:30 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:25 " "Info: Elapsed time: 00:00:25" {  } {  } 0}  } {  } 0}