singt2.tan.qmsg

来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· QMSG 代码 · 共 10 行 · 第 1/2 页

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node \"CLK\" is an undefined clock" {  } { { "SINGT2.vhd" "" { Text "E:/EDA/DDS/SINX/SINGT2.vhd" 6 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT_RESTRICTED" "CLK register register lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[6\] 125.0 MHz Internal " "Info: Clock \"CLK\" Internal fmax is restricted to 125.0 MHz between source register \"lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]\" and destination register \"lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[6\]\"" { { "Info" "ITDB_CLOCK_TCH_TCL" "4.0 ns 4.0 ns 8.0 ns " "Info: fmax restricted to Clock High delay (4.0 ns) plus Clock Low delay (4.0 ns) : restricted to 8.0 ns. Expand message to see actual delay path." { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.400 ns + Longest register register " "Info: + Longest register to register delay is 3.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] 1 REG LC1_C6 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_C6; Fanout = 11; REG Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.200 ns) 1.200 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[0\]~COUT 2 COMB LC1_C6 3 " "Info: 2: + IC(0.000 ns) + CELL(1.200 ns) = 1.200 ns; Loc. = LC1_C6; Fanout = 3; COMB Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[0\]~COUT'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "1.200 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 1.500 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[1\]~COUT 3 COMB LC2_C6 3 " "Info: 3: + IC(0.000 ns) + CELL(0.300 ns) = 1.500 ns; Loc. = LC2_C6; Fanout = 3; COMB Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[1\]~COUT'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "0.300 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 1.800 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[2\]~COUT 4 COMB LC3_C6 3 " "Info: 4: + IC(0.000 ns) + CELL(0.300 ns) = 1.800 ns; Loc. = LC3_C6; Fanout = 3; COMB Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[2\]~COUT'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "0.300 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 2.100 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[3\]~COUT 5 COMB LC4_C6 3 " "Info: 5: + IC(0.000 ns) + CELL(0.300 ns) = 2.100 ns; Loc. = LC4_C6; Fanout = 3; COMB Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[3\]~COUT'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "0.300 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 2.400 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[4\]~COUT 6 COMB LC5_C6 3 " "Info: 6: + IC(0.000 ns) + CELL(0.300 ns) = 2.400 ns; Loc. = LC5_C6; Fanout = 3; COMB Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[4\]~COUT'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "0.300 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 2.700 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[5\]~COUT 7 COMB LC6_C6 1 " "Info: 7: + IC(0.000 ns) + CELL(0.300 ns) = 2.700 ns; Loc. = LC6_C6; Fanout = 1; COMB Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|counter_cell\[5\]~COUT'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "0.300 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 311 15 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.700 ns) 3.400 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[6\] 8 REG LC7_C6 9 " "Info: 8: + IC(0.000 ns) + CELL(0.700 ns) = 3.400 ns; Loc. = LC7_C6; Fanout = 9; REG Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[6\]'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "0.700 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.400 ns 100.00 % " "Info: Total cell delay = 3.400 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "3.400 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 1.200ns 0.300ns 0.300ns 0.300ns 0.300ns 0.300ns 0.700ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 5.300 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK\" to destination register is 5.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.800 ns) 2.800 ns CLK 1 CLK PIN_2 69 " "Info: 1: + IC(0.000 ns) + CELL(2.800 ns) = 2.800 ns; Loc. = PIN_2; Fanout = 69; CLK Node = 'CLK'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "" { CLK } "NODE_NAME" } "" } } { "SINGT2.vhd" "" { Text "E:/EDA/DDS/SINX/SINGT2.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.500 ns) + CELL(0.000 ns) 5.300 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[6\] 2 REG LC7_C6 9 " "Info: 2: + IC(2.500 ns) + CELL(0.000 ns) = 5.300 ns; Loc. = LC7_C6; Fanout = 9; REG Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[6\]'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "2.500 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.800 ns 52.83 % " "Info: Total cell delay = 2.800 ns ( 52.83 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.500 ns 47.17 % " "Info: Total interconnect delay = 2.500 ns ( 47.17 % )" {  } {  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 5.300 ns - Longest register " "Info: - Longest clock path from clock \"CLK\" to source register is 5.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.800 ns) 2.800 ns CLK 1 CLK PIN_2 69 " "Info: 1: + IC(0.000 ns) + CELL(2.800 ns) = 2.800 ns; Loc. = PIN_2; Fanout = 69; CLK Node = 'CLK'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "" { CLK } "NODE_NAME" } "" } } { "SINGT2.vhd" "" { Text "E:/EDA/DDS/SINX/SINGT2.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.500 ns) + CELL(0.000 ns) 5.300 ns lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] 2 REG LC1_C6 11 " "Info: 2: + IC(2.500 ns) + CELL(0.000 ns) = 5.300 ns; Loc. = LC1_C6; Fanout = 11; REG Node = 'lpm_counter:Q_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "2.500 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.800 ns 52.83 % " "Info: Total cell delay = 2.800 ns ( 52.83 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.500 ns 47.17 % " "Info: Total interconnect delay = 2.500 ns ( 47.17 % )" {  } {  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } } { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns + " "Info: + Micro clock to output delay of source is 1.100 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "2.500 ns + " "Info: + Micro setup delay of destination is 2.500 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "3.400 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.400 ns" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 1.200ns 0.300ns 0.300ns 0.300ns 0.300ns 0.300ns 0.700ns } } } { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } } { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6] } {  } {  } } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK DOUT\[7\] data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~reg_ra0 29.500 ns memory " "Info: tco from clock \"CLK\" to destination pin \"DOUT\[7\]\" through memory \"data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~reg_ra0\" is 29.500 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 5.300 ns + Longest memory " "Info: + Longest clock path from clock \"CLK\" to source memory is 5.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.800 ns) 2.800 ns CLK 1 CLK PIN_2 69 " "Info: 1: + IC(0.000 ns) + CELL(2.800 ns) = 2.800 ns; Loc. = PIN_2; Fanout = 69; CLK Node = 'CLK'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "" { CLK } "NODE_NAME" } "" } } { "SINGT2.vhd" "" { Text "E:/EDA/DDS/SINX/SINGT2.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.500 ns) + CELL(0.000 ns) 5.300 ns data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~reg_ra0 2 MEM EC1_C 1 " "Info: 2: + IC(2.500 ns) + CELL(0.000 ns) = 5.300 ns; Loc. = EC1_C; Fanout = 1; MEM Node = 'data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~reg_ra0'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "2.500 ns" { CLK data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.800 ns 52.83 % " "Info: Total cell delay = 2.800 ns ( 52.83 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.500 ns 47.17 % " "Info: Total interconnect delay = 2.500 ns ( 47.17 % )" {  } {  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.600 ns + " "Info: + Micro clock to output delay of source is 0.600 ns" {  } { { "altrom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "23.600 ns + Longest memory pin " "Info: + Longest memory to pin delay is 23.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~reg_ra0 1 MEM EC1_C 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = EC1_C; Fanout = 1; MEM Node = 'data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~reg_ra0'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(10.700 ns) 10.700 ns data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~mem_cell_ra0 2 MEM EC1_C 1 " "Info: 2: + IC(0.000 ns) + CELL(10.700 ns) = 10.700 ns; Loc. = EC1_C; Fanout = 1; MEM Node = 'data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]~mem_cell_ra0'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "10.700 ns" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~mem_cell_ra0 } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.500 ns) 13.200 ns data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\] 3 MEM EC1_C 1 " "Info: 3: + IC(0.000 ns) + CELL(2.500 ns) = 13.200 ns; Loc. = EC1_C; Fanout = 1; MEM Node = 'data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[7\]'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "2.500 ns" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~mem_cell_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7] } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.600 ns) + CELL(1.800 ns) 17.600 ns DOUT\[7\]~7 4 COMB LC2_C19 1 " "Info: 4: + IC(2.600 ns) + CELL(1.800 ns) = 17.600 ns; Loc. = LC2_C19; Fanout = 1; COMB Node = 'DOUT\[7\]~7'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "4.400 ns" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7] DOUT[7]~7 } "NODE_NAME" } "" } } { "SINGT2.vhd" "" { Text "E:/EDA/DDS/SINX/SINGT2.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(5.100 ns) 23.600 ns DOUT\[7\] 5 PIN PIN_53 0 " "Info: 5: + IC(0.900 ns) + CELL(5.100 ns) = 23.600 ns; Loc. = PIN_53; Fanout = 0; PIN Node = 'DOUT\[7\]'" {  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "6.000 ns" { DOUT[7]~7 DOUT[7] } "NODE_NAME" } "" } } { "SINGT2.vhd" "" { Text "E:/EDA/DDS/SINX/SINGT2.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "20.100 ns 85.17 % " "Info: Total cell delay = 20.100 ns ( 85.17 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.500 ns 14.83 % " "Info: Total interconnect delay = 3.500 ns ( 14.83 % )" {  } {  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "23.600 ns" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~mem_cell_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7] DOUT[7]~7 DOUT[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "23.600 ns" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~mem_cell_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7] DOUT[7]~7 DOUT[7] } { 0.000ns 0.000ns 0.000ns 2.600ns 0.900ns } { 0.000ns 10.700ns 2.500ns 1.800ns 5.100ns } } }  } 0}  } { { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "5.300 ns" { CLK data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { CLK CLK~out data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } } { "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" "" { Report "E:/EDA/DDS/SINX/db/SINGT2_cmp.qrpt" Compiler "SINGT2" "UNKNOWN" "V1" "E:/EDA/DDS/SINX/db/SINGT2.quartus_db" { Floorplan "E:/EDA/DDS/SINX/" "" "23.600 ns" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~mem_cell_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7] DOUT[7]~7 DOUT[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "23.600 ns" { data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~reg_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]~mem_cell_ra0 data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7] DOUT[7]~7 DOUT[7] } { 0.000ns 0.000ns 0.000ns 2.600ns 0.900ns } { 0.000ns 10.700ns 2.500ns 1.800ns 5.100ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 09 22:16:27 2006 " "Info: Processing ended: Sun Apr 09 22:16:27 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}