divf_rom_sinx.tan.summary

来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· SUMMARY 代码 · 共 57 行

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 3.300 ns
From           : datain[3]
To             : divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[3]
From Clock     : 
To Clock       : clkin
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 35.900 ns
From           : sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[3]~reg_ra6
To             : Dadata[3]
From Clock     : clkin
To Clock       : 
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.800 ns
From           : datain[3]
To             : divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[3]
From Clock     : 
To Clock       : clkin
Failed Paths   : 0

Type           : Clock Setup: 'clkin'
Slack          : N/A
Required Time  : None
Actual Time    : 69.44 MHz ( period = 14.400 ns )
From           : sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]
To             : sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
From Clock     : clkin
To Clock       : clkin
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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