sf_df_rom_sinx.map.qmsg
来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· QMSG 代码 · 共 33 行
QMSG
33 行
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Apr 15 22:13:35 2006 " "Info: Processing started: Sat Apr 15 22:13:35 2006" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off sf_df_rom_sinx -c sf_df_rom_sinx " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off sf_df_rom_sinx -c sf_df_rom_sinx" { } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sf_df_rom_sinx.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file sf_df_rom_sinx.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sf_df_rom_sinx-behav " "Info: Found design unit 1: sf_df_rom_sinx-behav" { } { { "sf_df_rom_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sf_df_rom_sinx.vhd" 11 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 sf_df_rom_sinx " "Info: Found entity 1: sf_df_rom_sinx" { } { { "sf_df_rom_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sf_df_rom_sinx.vhd" 5 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "sf_df_rom_sinx " "Info: Elaborating entity \"sf_df_rom_sinx\" for the top level hierarchy" { } { } 0}
{ "Info" "ISGN_SEARCH_FILE" "SCANCNT4B.vhd 2 1 " "Info: Using design file SCANCNT4B.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 SCANCNT4B-behav " "Info: Found design unit 1: SCANCNT4B-behav" { } { { "SCANCNT4B.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/SCANCNT4B.vhd" 12 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 SCANCNT4B " "Info: Found entity 1: SCANCNT4B" { } { { "SCANCNT4B.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/SCANCNT4B.vhd" 5 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "SCANCNT4B SCANCNT4B:u1 " "Info: Elaborating entity \"SCANCNT4B\" for hierarchy \"SCANCNT4B:u1\"" { } { { "sf_df_rom_sinx.vhd" "u1" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sf_df_rom_sinx.vhd" 27 -1 0 } } } 0}
{ "Info" "ISGN_SEARCH_FILE" "divf_rom_sinx.vhd 2 1 " "Info: Using design file divf_rom_sinx.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 divf_rom_sinx-behav " "Info: Found design unit 1: divf_rom_sinx-behav" { } { { "divf_rom_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/divf_rom_sinx.vhd" 12 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 divf_rom_sinx " "Info: Found entity 1: divf_rom_sinx" { } { { "divf_rom_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/divf_rom_sinx.vhd" 5 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "divf_rom_sinx divf_rom_sinx:u2 " "Info: Elaborating entity \"divf_rom_sinx\" for hierarchy \"divf_rom_sinx:u2\"" { } { { "sf_df_rom_sinx.vhd" "u2" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sf_df_rom_sinx.vhd" 28 -1 0 } } } 0}
{ "Info" "ISGN_SEARCH_FILE" "divf.vhd 2 1 " "Info: Using design file divf.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 divf-behav " "Info: Found design unit 1: divf-behav" { } { { "divf.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/divf.vhd" 13 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 divf " "Info: Found entity 1: divf" { } { { "divf.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/divf.vhd" 5 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "divf divf_rom_sinx:u2\|divf:u1 " "Info: Elaborating entity \"divf\" for hierarchy \"divf_rom_sinx:u2\|divf:u1\"" { } { { "divf_rom_sinx.vhd" "u1" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/divf_rom_sinx.vhd" 28 -1 0 } } } 0}
{ "Info" "ISGN_SEARCH_FILE" "sinx_rom.vhd 2 1 " "Info: Using design file sinx_rom.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sinx_rom-behav " "Info: Found design unit 1: sinx_rom-behav" { } { { "sinx_rom.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sinx_rom.vhd" 11 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 sinx_rom " "Info: Found entity 1: sinx_rom" { } { { "sinx_rom.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sinx_rom.vhd" 5 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sinx_rom divf_rom_sinx:u2\|sinx_rom:u2 " "Info: Elaborating entity \"sinx_rom\" for hierarchy \"divf_rom_sinx:u2\|sinx_rom:u2\"" { } { { "divf_rom_sinx.vhd" "u2" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/divf_rom_sinx.vhd" 29 -1 0 } } } 0}
{ "Info" "ISGN_SEARCH_FILE" "data_rom_10k.vhd 2 1 " "Info: Using design file data_rom_10k.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 data_rom_10k-SYN " "Info: Found design unit 1: data_rom_10k-SYN" { } { { "data_rom_10k.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/data_rom_10k.vhd" 49 -1 0 } } } 0} { "Info" "ISGN_ENTITY_NAME" "1 data_rom_10k " "Info: Found entity 1: data_rom_10k" { } { { "data_rom_10k.vhd" "" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/data_rom_10k.vhd" 39 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "data_rom_10k divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1 " "Info: Elaborating entity \"data_rom_10k\" for hierarchy \"divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\"" { } { { "sinx_rom.vhd" "u1" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sinx_rom.vhd" 28 -1 0 } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_rom " "Info: Found entity 1: lpm_rom" { } { { "lpm_rom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf" 40 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_rom divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component " "Info: Elaborating entity \"lpm_rom\" for hierarchy \"divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\"" { } { { "data_rom_10k.vhd" "lpm_rom_component" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/data_rom_10k.vhd" 75 -1 0 } } } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/altrom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/altrom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altrom " "Info: Found entity 1: altrom" { } { { "altrom.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/altrom.tdf" 75 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altrom divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom " "Info: Elaborating entity \"altrom\" for hierarchy \"divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|altrom:srom\"" { } { { "lpm_rom.tdf" "srom" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_rom.tdf" 51 3 0 } } } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "3 " "Info: Inferred 3 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "divf_rom_sinx:u2\|sinx_rom:u2\|Q\[0\]~7 7 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=7) from the following logic: \"divf_rom_sinx:u2\|sinx_rom:u2\|Q\[0\]~7\"" { } { { "sinx_rom.vhd" "Q\[0\]~7" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/sinx_rom.vhd" 19 -1 0 } } } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "divf_rom_sinx:u2\|divf:u1\|CNT4\[0\]~4 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"divf_rom_sinx:u2\|divf:u1\|CNT4\[0\]~4\"" { } { { "divf.vhd" "CNT4\[0\]~4" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/divf.vhd" 17 -1 0 } } } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "SCANCNT4B:u1\|CNT4\[0\]~4 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"SCANCNT4B:u1\|CNT4\[0\]~4\"" { } { { "SCANCNT4B.vhd" "CNT4\[0\]~4" { Text "E:/EDA/DDS/10k844/sinx_rom/rom_sinx/SCANCNT4B.vhd" 16 -1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" { } { { "lpm_counter.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } } } 0} } { } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_f10ke " "Info: Found entity 1: alt_counter_f10ke" { } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 250 1 0 } } } 0} } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[0\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[0\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[1\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[1\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[2\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[2\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[3\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[3\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[4\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[4\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[5\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[5\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[6\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[6\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Warning" "WOPT_OPT_REMOVED_ALWAYS_ENABLED_TRI" "divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[7\] " "Warning: Removed always-enabled tri-state buffer divf_rom_sinx:u2\|sinx_rom:u2\|data_rom_10k:u1\|lpm_rom:lpm_rom_component\|otri\[7\] feeding logic, open-drain buffer or output pin" { } { } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "39 " "Info: Implemented 39 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" { } { } 0} { "Info" "ISCL_SCL_TM_OPINS" "9 " "Info: Implemented 9 output pins" { } { } 0} { "Info" "ISCL_SCL_TM_LCELLS" "20 " "Info: Implemented 20 logic cells" { } { } 0} { "Info" "ISCL_SCL_TM_RAMS" "8 " "Info: Implemented 8 RAM segments" { } { } 0} } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 8 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 8 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Apr 15 22:13:39 2006 " "Info: Processing ended: Sat Apr 15 22:13:39 2006" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" { } { } 0} } { } 0}
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