divf_rom_sinx.map.eqn

来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· EQN 代码 · 共 388 行

-- Copyright (C) 1991-2005 Altera Corporation
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--C1_cout is sinx_rom:u2|cout
--operation mode is normal

C1_cout_lut_out = !C1L3 & E2_q[2] & E2_q[1] & E2_q[0];
C1_cout = DFFEA(C1_cout_lut_out, B1_COUT, , , , , );

--C1L2Q is sinx_rom:u2|cout~0
--operation mode is normal

C1L2Q = C1_cout;


--H1_q[0] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[0]
H1_q[0]_clock_0 = B1_COUT;
H1_q[0]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[0]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[0] = MEMORY_SEGMENT(, , H1_q[0]_clock_0, , , , , , H1_q[0]_write_address, H1_q[0]_read_address);


--H1_q[1] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[1]
H1_q[1]_clock_0 = B1_COUT;
H1_q[1]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[1]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[1] = MEMORY_SEGMENT(, , H1_q[1]_clock_0, , , , , , H1_q[1]_write_address, H1_q[1]_read_address);


--H1_q[2] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[2]
H1_q[2]_clock_0 = B1_COUT;
H1_q[2]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[2]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[2] = MEMORY_SEGMENT(, , H1_q[2]_clock_0, , , , , , H1_q[2]_write_address, H1_q[2]_read_address);


--H1_q[3] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[3]
H1_q[3]_clock_0 = B1_COUT;
H1_q[3]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[3]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[3] = MEMORY_SEGMENT(, , H1_q[3]_clock_0, , , , , , H1_q[3]_write_address, H1_q[3]_read_address);


--H1_q[4] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[4]
H1_q[4]_clock_0 = B1_COUT;
H1_q[4]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[4]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[4] = MEMORY_SEGMENT(, , H1_q[4]_clock_0, , , , , , H1_q[4]_write_address, H1_q[4]_read_address);


--H1_q[5] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[5]
H1_q[5]_clock_0 = B1_COUT;
H1_q[5]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[5]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[5] = MEMORY_SEGMENT(, , H1_q[5]_clock_0, , , , , , H1_q[5]_write_address, H1_q[5]_read_address);


--H1_q[6] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[6]
H1_q[6]_clock_0 = B1_COUT;
H1_q[6]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[6]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[6] = MEMORY_SEGMENT(, , H1_q[6]_clock_0, , , , , , H1_q[6]_write_address, H1_q[6]_read_address);


--H1_q[7] is sinx_rom:u2|data_rom_10k:u1|lpm_rom:lpm_rom_component|altrom:srom|q[7]
H1_q[7]_clock_0 = B1_COUT;
H1_q[7]_write_address = WR_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[7]_read_address = RD_ADDR(E2_q[0], E2_q[1], E2_q[2], E2_q[3], E2_q[4], E2_q[5], E2_q[6]);
H1_q[7] = MEMORY_SEGMENT(, , H1_q[7]_clock_0, , , , , , H1_q[7]_write_address, H1_q[7]_read_address);


--E2_q[6] is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6]
--operation mode is clrb_cntr

E2_q[6]_lut_out = (E2_q[6] $ E2L31) & C1L4;
E2_q[6] = DFFEA(E2_q[6]_lut_out, B1_COUT, , , , , );

--E2L92Q is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[6]~0
--operation mode is clrb_cntr

E2L92Q = E2_q[6];


--E2_q[5] is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is clrb_cntr

E2_q[5]_lut_out = (E2_q[5] $ E2L11) & C1L4;
E2_q[5] = DFFEA(E2_q[5]_lut_out, B1_COUT, , , , , );

--E2L72Q is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[5]~1
--operation mode is clrb_cntr

E2L72Q = E2_q[5];

--E2L31 is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT
--operation mode is clrb_cntr

E2L31 = CARRY(E2_q[5] & (E2L11));


--E2_q[4] is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is clrb_cntr

E2_q[4]_lut_out = (E2_q[4] $ E2L9) & C1L4;
E2_q[4] = DFFEA(E2_q[4]_lut_out, B1_COUT, , , , , );

--E2L52Q is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[4]~2
--operation mode is clrb_cntr

E2L52Q = E2_q[4];

--E2L11 is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT
--operation mode is clrb_cntr

E2L11 = CARRY(E2_q[4] & (E2L9));


--E2_q[3] is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

E2_q[3]_lut_out = (E2_q[3] $ E2L7) & C1L4;
E2_q[3] = DFFEA(E2_q[3]_lut_out, B1_COUT, , , , , );

--E2L32Q is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~3
--operation mode is clrb_cntr

E2L32Q = E2_q[3];

--E2L9 is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is clrb_cntr

E2L9 = CARRY(E2_q[3] & (E2L7));


--C1L3 is sinx_rom:u2|LessThan~63
--operation mode is normal

C1L3 = !E2_q[3] # !E2_q[4] # !E2_q[5] # !E2_q[6];

--C1L5 is sinx_rom:u2|LessThan~66
--operation mode is normal

C1L5 = !E2_q[3] # !E2_q[4] # !E2_q[5] # !E2_q[6];


--E2_q[2] is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

E2_q[2]_lut_out = (E2_q[2] $ E2L5) & C1L4;
E2_q[2] = DFFEA(E2_q[2]_lut_out, B1_COUT, , , , , );

--E2L12Q is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~4
--operation mode is clrb_cntr

E2L12Q = E2_q[2];

--E2L7 is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

E2L7 = CARRY(E2_q[2] & (E2L5));


--E2_q[1] is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

E2_q[1]_lut_out = (E2_q[1] $ E2L3) & C1L4;
E2_q[1] = DFFEA(E2_q[1]_lut_out, B1_COUT, , , , , );

--E2L91Q is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~5
--operation mode is clrb_cntr

E2L91Q = E2_q[1];

--E2L5 is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

E2L5 = CARRY(E2_q[1] & (E2L3));


--E2_q[0] is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

E2_q[0]_lut_out = (!E2_q[0]) & C1L4;
E2_q[0] = DFFEA(E2_q[0]_lut_out, B1_COUT, , , , , );

--E2L71Q is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~6
--operation mode is clrb_cntr

E2L71Q = E2_q[0];

--E2L3 is sinx_rom:u2|lpm_counter:Q_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr

E2L3 = CARRY(E2_q[0]);


--C1L4 is sinx_rom:u2|LessThan~64
--operation mode is normal

C1L4 = C1L3 # !E2_q[0] # !E2_q[1] # !E2_q[2];

--C1L6 is sinx_rom:u2|LessThan~67
--operation mode is normal

C1L6 = C1L3 # !E2_q[0] # !E2_q[1] # !E2_q[2];


--B1_COUT is divf:u1|COUT
--operation mode is normal

B1_COUT_lut_out = E1_q[3] & E1_q[2] & E1_q[1] & E1_q[0];
B1_COUT = DFFEA(B1_COUT_lut_out, clkin, , , , , );

--B1L2Q is divf:u1|COUT~0
--operation mode is normal

B1L2Q = B1_COUT;


--E1_q[3] is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is up_dn_cntr

E1_q[3]_lut_out = (E1_q[3] $ E1L7 & B1L3) # (datain[3] & !B1L3);
E1_q[3] = DFFEA(E1_q[3]_lut_out, clkin, , , , , );

--E1L71Q is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[3]~0
--operation mode is up_dn_cntr

E1L71Q = E1_q[3];


--E1_q[2] is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is up_dn_cntr

E1_q[2]_lut_out = (E1_q[2] $ E1L5 & B1L3) # (datain[2] & !B1L3);
E1_q[2] = DFFEA(E1_q[2]_lut_out, clkin, , , , , );

--E1L51Q is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[2]~1
--operation mode is up_dn_cntr

E1L51Q = E1_q[2];

--E1L7 is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is up_dn_cntr

E1L7 = CARRY(E1_q[2] & (E1L5));


--E1_q[1] is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is up_dn_cntr

E1_q[1]_lut_out = (E1_q[1] $ E1L3 & B1L3) # (datain[1] & !B1L3);
E1_q[1] = DFFEA(E1_q[1]_lut_out, clkin, , , , , );

--E1L31Q is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[1]~2
--operation mode is up_dn_cntr

E1L31Q = E1_q[1];

--E1L5 is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is up_dn_cntr

E1L5 = CARRY(E1_q[1] & (E1L3));


--E1_q[0] is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is up_dn_cntr

E1_q[0]_lut_out = (!E1_q[0] & B1L3) # (datain[0] & !B1L3);
E1_q[0] = DFFEA(E1_q[0]_lut_out, clkin, , , , , );

--E1L11Q is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|q[0]~3
--operation mode is up_dn_cntr

E1L11Q = E1_q[0];

--E1L3 is divf:u1|lpm_counter:CNT4_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is up_dn_cntr

E1L3 = CARRY(E1_q[0]);


--B1L3 is divf:u1|LessThan~34
--operation mode is normal

B1L3 = !E1_q[0] # !E1_q[1] # !E1_q[2] # !E1_q[3];

--B1L4 is divf:u1|LessThan~36
--operation mode is normal

B1L4 = !E1_q[0] # !E1_q[1] # !E1_q[2] # !E1_q[3];


--clkin is clkin
--operation mode is input

clkin = INPUT();


--datain[3] is datain[3]
--operation mode is input

datain[3] = INPUT();


--datain[2] is datain[2]
--operation mode is input

datain[2] = INPUT();


--datain[1] is datain[1]
--operation mode is input

datain[1] = INPUT();


--datain[0] is datain[0]
--operation mode is input

datain[0] = INPUT();


--f is f
--operation mode is output

f = OUTPUT(C1_cout);


--Dadata[0] is Dadata[0]
--operation mode is output

Dadata[0] = OUTPUT(H1_q[0]);


--Dadata[1] is Dadata[1]
--operation mode is output

Dadata[1] = OUTPUT(H1_q[1]);


--Dadata[2] is Dadata[2]
--operation mode is output

Dadata[2] = OUTPUT(H1_q[2]);


--Dadata[3] is Dadata[3]
--operation mode is output

Dadata[3] = OUTPUT(H1_q[3]);


--Dadata[4] is Dadata[4]
--operation mode is output

Dadata[4] = OUTPUT(H1_q[4]);


--Dadata[5] is Dadata[5]
--operation mode is output

Dadata[5] = OUTPUT(H1_q[5]);


--Dadata[6] is Dadata[6]
--operation mode is output

Dadata[6] = OUTPUT(H1_q[6]);


--Dadata[7] is Dadata[7]
--operation mode is output

Dadata[7] = OUTPUT(H1_q[7]);