scancnt4b.fit.rpt
来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· RPT 代码 · 共 435 行 · 第 1/2 页
RPT
435 行
; 78 ; GND* ; ;
; 79 ; GND* ; ;
; 80 ; GND* ; ;
; 81 ; GND* ; ;
; 82 ; GND_INT ; ;
; 83 ; GND* ; ;
; 84 ; EN ; TTL ;
+-------+------------+--------------+
+------------------------------------------------------+
; Control Signals ;
+------+-------+---------+--------------+--------------+
; Name ; Pin # ; Fan-Out ; Usage ; Global Usage ;
+------+-------+---------+--------------+--------------+
; EN ; 84 ; 4 ; Clock enable ; Non-global ;
; CLK ; 43 ; 4 ; Clock ; Pin ;
+------+-------+---------+--------------+--------------+
+---------------------------------+
; Global & Other Fast Signals ;
+------+-------+---------+--------+
; Name ; Pin # ; Fan-Out ; Global ;
+------+-------+---------+--------+
; EN ; 84 ; 4 ; no ;
; CLK ; 43 ; 4 ; yes ;
+------+-------+---------+--------+
+---------------------------------------------+
; Carry Chains ;
+--------------------+------------------------+
; Carry Chain Length ; Number of Carry Chains ;
+--------------------+------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 1 ;
+--------------------+------------------------+
+--------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals ;
+----------------------------------------------------------------------------+---------+
; Name ; Fan-Out ;
+----------------------------------------------------------------------------+---------+
; EN ; 4 ;
; lpm_counter:CNT4_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT ; 2 ;
; lpm_counter:CNT4_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT ; 2 ;
; lpm_counter:CNT4_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT ; 2 ;
; lpm_counter:CNT4_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~3 ; 1 ;
+----------------------------------------------------------------------------+---------+
+-------------------------------------------+
; LAB ;
+--------------------------+----------------+
; Number of Logic Elements ; Number of LABs ;
+--------------------------+----------------+
; 0 ; 71 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 1 ;
+--------------------------+----------------+
+---------------------------------------------+
; LAB External Interconnect ;
+----------------------------+----------------+
; LAB External Interconnects ; Number of LABs ;
+----------------------------+----------------+
; 0 ; 71 ;
; 1 ; 1 ;
+----------------------------+----------------+
+----------------------------------------------------------------------------------------+
; Row Interconnect ;
+-------+-------------------+-----------------------------+------------------------------+
; Row ; Interconnect Used ; Left Half Interconnect Used ; Right Half Interconnect Used ;
+-------+-------------------+-----------------------------+------------------------------+
; A ; 0 / 96 ( 0 % ) ; 0 / 48 ( 0 % ) ; 3 / 48 ( 6 % ) ;
; B ; 0 / 96 ( 0 % ) ; 0 / 48 ( 0 % ) ; 0 / 48 ( 0 % ) ;
; C ; 0 / 96 ( 0 % ) ; 0 / 48 ( 0 % ) ; 0 / 48 ( 0 % ) ;
; Total ; 0 / 288 ( 0 % ) ; 0 / 144 ( 0 % ) ; 3 / 144 ( 2 % ) ;
+-------+-------------------+-----------------------------+------------------------------+
+----------------------------+
; LAB Column Interconnect ;
+-------+--------------------+
; Col. ; Interconnect Used ;
+-------+--------------------+
; 1 ; 0 / 24 ( 0 % ) ;
; 2 ; 0 / 24 ( 0 % ) ;
; 3 ; 0 / 24 ( 0 % ) ;
; 4 ; 0 / 24 ( 0 % ) ;
; 5 ; 0 / 24 ( 0 % ) ;
; 6 ; 0 / 24 ( 0 % ) ;
; 7 ; 0 / 24 ( 0 % ) ;
; 8 ; 0 / 24 ( 0 % ) ;
; 9 ; 0 / 24 ( 0 % ) ;
; 10 ; 0 / 24 ( 0 % ) ;
; 11 ; 0 / 24 ( 0 % ) ;
; 12 ; 0 / 24 ( 0 % ) ;
; 13 ; 0 / 24 ( 0 % ) ;
; 14 ; 0 / 24 ( 0 % ) ;
; 15 ; 1 / 24 ( 4 % ) ;
; 16 ; 0 / 24 ( 0 % ) ;
; 17 ; 0 / 24 ( 0 % ) ;
; 18 ; 0 / 24 ( 0 % ) ;
; 19 ; 0 / 24 ( 0 % ) ;
; 20 ; 0 / 24 ( 0 % ) ;
; 21 ; 0 / 24 ( 0 % ) ;
; 22 ; 0 / 24 ( 0 % ) ;
; 23 ; 0 / 24 ( 0 % ) ;
; 24 ; 0 / 24 ( 0 % ) ;
; Total ; 1 / 576 ( < 1 % ) ;
+-------+--------------------+
+---------------------------+
; LAB Column Interconnect ;
+-------+-------------------+
; Col. ; Interconnect Used ;
+-------+-------------------+
; 1 ; 0 / 24 ( 0 % ) ;
; Total ; 0 / 24 ( 0 % ) ;
+-------+-------------------+
+----------------------------------------------------+
; Fitter Resource Usage Summary ;
+--------------------------------+-------------------+
; Resource ; Usage ;
+--------------------------------+-------------------+
; Registers ; 4 / 576 ( < 1 % ) ;
; Total LABs ; 0 / 72 ( 0 % ) ;
; Logic elements in carry chains ; 4 ;
; User inserted logic elements ; 0 ;
; I/O pins ; 6 / 59 ( 10 % ) ;
; -- Clock pins ; 1 ;
; -- Dedicated input pins ; 4 / 4 ( 100 % ) ;
; Global signals ; 1 ;
; EABs ; 0 / 3 ( 0 % ) ;
; Total memory bits ; 0 / 6,144 ( 0 % ) ;
; Total RAM block bits ; 0 / 6,144 ( 0 % ) ;
; Maximum fan-out node ; EN ;
; Maximum fan-out ; 4 ;
; Total fan-out ; 15 ;
; Average fan-out ; 1.50 ;
+--------------------------------+-------------------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------------------------------------------------------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Full Hierarchy Name ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------------------------------------------------------------+
; |SCANCNT4B ; 4 (0) ; 4 ; 0 ; 6 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |SCANCNT4B ;
; |lpm_counter:CNT4_rtl_0| ; 4 (0) ; 4 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (0) ; 4 (0) ; |SCANCNT4B|lpm_counter:CNT4_rtl_0 ;
; |alt_counter_f10ke:wysi_counter| ; 4 (4) ; 4 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 4 (4) ; 4 (4) ; |SCANCNT4B|lpm_counter:CNT4_rtl_0|alt_counter_f10ke:wysi_counter ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+----------------------------------+
; Delay Chain Summary ;
+---------+----------+-------------+
; Name ; Pin Type ; Pad to Core ;
+---------+----------+-------------+
; EN ; Input ; OFF ;
; CLK ; Input ; OFF ;
; FOUT[0] ; Output ; OFF ;
; FOUT[1] ; Output ; OFF ;
; FOUT[2] ; Output ; OFF ;
; FOUT[3] ; Output ; OFF ;
+---------+----------+-------------+
+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in E:/EDA/DDS/10k844/scancnt4b/SCANCNT4B.pin.
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
Info: Processing started: Fri Apr 14 20:56:08 2006
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off SCANCNT4B -c SCANCNT4B
Info: Selected device EPF10K10LC84-4 for design "SCANCNT4B"
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
Info: Assuming a global fmax requirement of 1000 MHz
Info: Not setting a global tsu requirement
Info: Not setting a global tco requirement
Info: Not setting a global tpd requirement
Info: Inserted 0 logic cells in first fitting attempt
Info: Started fitting attempt 1 on Fri Apr 14 2006 at 20:56:12
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Fitter routing operations beginning
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Processing ended: Fri Apr 14 20:56:14 2006
Info: Elapsed time: 00:00:07
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