data_rom.map.eqn

来自「在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器」· EQN 代码 · 共 166 行

-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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--C1_q[0] is lpm_rom:lpm_rom_component|altrom:srom|q[0]
C1_q[0]_clock_0 = inclock;
C1_q[0]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[0]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[0] = MEMORY_SEGMENT(, , C1_q[0]_clock_0, , , , , , C1_q[0]_write_address, C1_q[0]_read_address);


--C1_q[1] is lpm_rom:lpm_rom_component|altrom:srom|q[1]
C1_q[1]_clock_0 = inclock;
C1_q[1]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[1]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[1] = MEMORY_SEGMENT(, , C1_q[1]_clock_0, , , , , , C1_q[1]_write_address, C1_q[1]_read_address);


--C1_q[2] is lpm_rom:lpm_rom_component|altrom:srom|q[2]
C1_q[2]_clock_0 = inclock;
C1_q[2]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[2]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[2] = MEMORY_SEGMENT(, , C1_q[2]_clock_0, , , , , , C1_q[2]_write_address, C1_q[2]_read_address);


--C1_q[3] is lpm_rom:lpm_rom_component|altrom:srom|q[3]
C1_q[3]_clock_0 = inclock;
C1_q[3]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[3]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[3] = MEMORY_SEGMENT(, , C1_q[3]_clock_0, , , , , , C1_q[3]_write_address, C1_q[3]_read_address);


--C1_q[4] is lpm_rom:lpm_rom_component|altrom:srom|q[4]
C1_q[4]_clock_0 = inclock;
C1_q[4]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[4]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[4] = MEMORY_SEGMENT(, , C1_q[4]_clock_0, , , , , , C1_q[4]_write_address, C1_q[4]_read_address);


--C1_q[5] is lpm_rom:lpm_rom_component|altrom:srom|q[5]
C1_q[5]_clock_0 = inclock;
C1_q[5]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[5]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[5] = MEMORY_SEGMENT(, , C1_q[5]_clock_0, , , , , , C1_q[5]_write_address, C1_q[5]_read_address);


--C1_q[6] is lpm_rom:lpm_rom_component|altrom:srom|q[6]
C1_q[6]_clock_0 = inclock;
C1_q[6]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[6]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[6] = MEMORY_SEGMENT(, , C1_q[6]_clock_0, , , , , , C1_q[6]_write_address, C1_q[6]_read_address);


--C1_q[7] is lpm_rom:lpm_rom_component|altrom:srom|q[7]
C1_q[7]_clock_0 = inclock;
C1_q[7]_write_address = WR_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[7]_read_address = RD_ADDR(address[0], address[1], address[2], address[3], address[4], address[5], address[6]);
C1_q[7] = MEMORY_SEGMENT(, , C1_q[7]_clock_0, , , , , , C1_q[7]_write_address, C1_q[7]_read_address);


--inclock is inclock
--operation mode is input

inclock = INPUT();


--address[0] is address[0]
--operation mode is input

address[0] = INPUT();


--address[1] is address[1]
--operation mode is input

address[1] = INPUT();


--address[2] is address[2]
--operation mode is input

address[2] = INPUT();


--address[3] is address[3]
--operation mode is input

address[3] = INPUT();


--address[4] is address[4]
--operation mode is input

address[4] = INPUT();


--address[5] is address[5]
--operation mode is input

address[5] = INPUT();


--address[6] is address[6]
--operation mode is input

address[6] = INPUT();


--q[0] is q[0]
--operation mode is output

q[0] = OUTPUT(C1_q[0]);


--q[1] is q[1]
--operation mode is output

q[1] = OUTPUT(C1_q[1]);


--q[2] is q[2]
--operation mode is output

q[2] = OUTPUT(C1_q[2]);


--q[3] is q[3]
--operation mode is output

q[3] = OUTPUT(C1_q[3]);


--q[4] is q[4]
--operation mode is output

q[4] = OUTPUT(C1_q[4]);


--q[5] is q[5]
--operation mode is output

q[5] = OUTPUT(C1_q[5]);


--q[6] is q[6]
--operation mode is output

q[6] = OUTPUT(C1_q[6]);


--q[7] is q[7]
--operation mode is output

q[7] = OUTPUT(C1_q[7]);