top_sinx.tan.qmsg

在EDA开发软件QuartusII上利用VHDL语言实现DDS信号发生器

{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clkin " "Info: Assuming node \"clkin\" is an undefined clock" {  } { { "top_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/top/top_sinx.vhd" 5 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clkin" } } } }  } 0}  } {  } 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "1 " "Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[2\] " "Info: Detected ripple clock \"INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[2\]\" as buffer" {  } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[2\]" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clkin register INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] register INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] 46.08 MHz 21.7 ns Internal " "Info: Clock \"clkin\" has Internal fmax of 46.08 MHz between source register \"INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]\" and destination register \"INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]\" (period= 21.7 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "18.100 ns + Longest register register " "Info: + Longest register to register delay is 18.100 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] 1 REG LC7_B15 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC7_B15; Fanout = 4; REG Node = 'INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "" { INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(1.200 ns) 3.400 ns INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[0\] 2 COMB LC1_B14 2 " "Info: 2: + IC(2.200 ns) + CELL(1.200 ns) = 3.400 ns; Loc. = LC1_B14; Fanout = 2; COMB Node = 'INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[0\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "3.400 ns" { INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 3.700 ns INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[1\] 3 COMB LC2_B14 2 " "Info: 3: + IC(0.000 ns) + CELL(0.300 ns) = 3.700 ns; Loc. = LC2_B14; Fanout = 2; COMB Node = 'INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[1\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "0.300 ns" { INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 4.000 ns INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\] 4 COMB LC3_B14 2 " "Info: 4: + IC(0.000 ns) + CELL(0.300 ns) = 4.000 ns; Loc. = LC3_B14; Fanout = 2; COMB Node = 'INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[2\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "0.300 ns" { INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 4.300 ns INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\] 5 COMB LC4_B14 2 " "Info: 5: + IC(0.000 ns) + CELL(0.300 ns) = 4.300 ns; Loc. = LC4_B14; Fanout = 2; COMB Node = 'INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[3\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "0.300 ns" { INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 4.600 ns INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\] 6 COMB LC5_B14 2 " "Info: 6: + IC(0.000 ns) + CELL(0.300 ns) = 4.600 ns; Loc. = LC5_B14; Fanout = 2; COMB Node = 'INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[4\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "0.300 ns" { INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.300 ns) 4.900 ns INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[5\] 7 COMB LC6_B14 2 " "Info: 7: + IC(0.000 ns) + CELL(0.300 ns) = 4.900 ns; Loc. = LC6_B14; Fanout = 2; COMB Node = 'INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cout\[5\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "0.300 ns" { INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 18 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.300 ns) 6.200 ns INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[6\] 8 COMB LC7_B14 1 " "Info: 8: + IC(0.000 ns) + CELL(1.300 ns) = 6.200 ns; Loc. = LC7_B14; Fanout = 1; COMB Node = 'INIT_CNT8B:U1\|lpm_add_sub:add_rtl_2\|addcore:adder\|a_csnbuffer:result_node\|cs_buffer\[6\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "1.300 ns" { INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] } "NODE_NAME" } "" } } { "a_csnbuffer.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/a_csnbuffer.tdf" 25 13 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(2.300 ns) 10.700 ns INIT_CNT8B:U1\|reduce_nor~49 9 COMB LC3_B13 1 " "Info: 9: + IC(2.200 ns) + CELL(2.300 ns) = 10.700 ns; Loc. = LC3_B13; Fanout = 1; COMB Node = 'INIT_CNT8B:U1\|reduce_nor~49'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "4.500 ns" { INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] INIT_CNT8B:U1|reduce_nor~49 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(1.800 ns) 14.700 ns INIT_CNT8B:U1\|reduce_nor~51 10 COMB LC7_B17 13 " "Info: 10: + IC(2.200 ns) + CELL(1.800 ns) = 14.700 ns; Loc. = LC7_B17; Fanout = 13; COMB Node = 'INIT_CNT8B:U1\|reduce_nor~51'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "4.000 ns" { INIT_CNT8B:U1|reduce_nor~49 INIT_CNT8B:U1|reduce_nor~51 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.200 ns) + CELL(1.200 ns) 18.100 ns INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] 11 REG LC7_B15 4 " "Info: 11: + IC(2.200 ns) + CELL(1.200 ns) = 18.100 ns; Loc. = LC7_B15; Fanout = 4; REG Node = 'INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "3.400 ns" { INIT_CNT8B:U1|reduce_nor~51 INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "9.300 ns 51.38 % " "Info: Total cell delay = 9.300 ns ( 51.38 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.800 ns 48.62 % " "Info: Total interconnect delay = 8.800 ns ( 48.62 % )" {  } {  } 0}  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "18.100 ns" { INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] INIT_CNT8B:U1|reduce_nor~49 INIT_CNT8B:U1|reduce_nor~51 INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "18.100 ns" { INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] INIT_CNT8B:U1|reduce_nor~49 INIT_CNT8B:U1|reduce_nor~51 INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 2.200ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 2.200ns 2.200ns 2.200ns } { 0.000ns 1.200ns 0.300ns 0.300ns 0.300ns 0.300ns 0.300ns 1.300ns 2.300ns 1.800ns 1.200ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clkin destination 5.300 ns + Shortest register " "Info: + Shortest clock path from clock \"clkin\" to destination register is 5.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.800 ns) 2.800 ns clkin 1 CLK PIN_43 13 " "Info: 1: + IC(0.000 ns) + CELL(2.800 ns) = 2.800 ns; Loc. = PIN_43; Fanout = 13; CLK Node = 'clkin'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "" { clkin } "NODE_NAME" } "" } } { "top_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/top/top_sinx.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.500 ns) + CELL(0.000 ns) 5.300 ns INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] 2 REG LC7_B15 4 " "Info: 2: + IC(2.500 ns) + CELL(0.000 ns) = 5.300 ns; Loc. = LC7_B15; Fanout = 4; REG Node = 'INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "2.500 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.800 ns 52.83 % " "Info: Total cell delay = 2.800 ns ( 52.83 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.500 ns 47.17 % " "Info: Total interconnect delay = 2.500 ns ( 47.17 % )" {  } {  } 0}  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "5.300 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { clkin clkin~out INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clkin source 5.300 ns - Longest register " "Info: - Longest clock path from clock \"clkin\" to source register is 5.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.800 ns) 2.800 ns clkin 1 CLK PIN_43 13 " "Info: 1: + IC(0.000 ns) + CELL(2.800 ns) = 2.800 ns; Loc. = PIN_43; Fanout = 13; CLK Node = 'clkin'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "" { clkin } "NODE_NAME" } "" } } { "top_sinx.vhd" "" { Text "E:/EDA/DDS/10k844/top/top_sinx.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.500 ns) + CELL(0.000 ns) 5.300 ns INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\] 2 REG LC7_B15 4 " "Info: 2: + IC(2.500 ns) + CELL(0.000 ns) = 5.300 ns; Loc. = LC7_B15; Fanout = 4; REG Node = 'INIT_CNT8B:U1\|lpm_counter:CNT8_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[0\]'" {  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "2.500 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.800 ns 52.83 % " "Info: Total cell delay = 2.800 ns ( 52.83 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.500 ns 47.17 % " "Info: Total interconnect delay = 2.500 ns ( 47.17 % )" {  } {  } 0}  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "5.300 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { clkin clkin~out INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0}  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "5.300 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { clkin clkin~out INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } } { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "5.300 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { clkin clkin~out INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.100 ns + " "Info: + Micro clock to output delay of source is 1.100 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "2.500 ns + " "Info: + Micro setup delay of destination is 2.500 ns" {  } { { "alt_counter_f10ke.tdf" "" { Text "d:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } }  } 0}  } { { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "18.100 ns" { INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] INIT_CNT8B:U1|reduce_nor~49 INIT_CNT8B:U1|reduce_nor~51 INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "18.100 ns" { INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[3] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[4] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[5] INIT_CNT8B:U1|lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] INIT_CNT8B:U1|reduce_nor~49 INIT_CNT8B:U1|reduce_nor~51 INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 2.200ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 2.200ns 2.200ns 2.200ns } { 0.000ns 1.200ns 0.300ns 0.300ns 0.300ns 0.300ns 0.300ns 1.300ns 2.300ns 1.800ns 1.200ns } } } { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "5.300 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { clkin clkin~out INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } } { "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" "" { Report "E:/EDA/DDS/10k844/top/db/top_sinx_cmp.qrpt" Compiler "top_sinx" "UNKNOWN" "V1" "E:/EDA/DDS/10k844/top/db/top_sinx.quartus_db" { Floorplan "E:/EDA/DDS/10k844/top/" "" "5.300 ns" { clkin INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.300 ns" { clkin clkin~out INIT_CNT8B:U1|lpm_counter:CNT8_rtl_0|alt_counter_f10ke:wysi_counter|q[0] } { 0.000ns 0.000ns 2.500ns } { 0.000ns 2.800ns 0.000ns } } }  } 0}