counter.fit

我们学校做VHDL实验的源码

-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 04/01/2007 14:16:01      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "counter"
BEGIN

    DEVICE = "EPM7128SLC84-10";

    "CLK"                          : INPUT_PIN  = 2      ;
    "EN"                           : INPUT_PIN  = 31     ; -- LC35
    "LOAD0"                        : INPUT_PIN  = 34     ; -- LC61
    "LOAD1"                        : INPUT_PIN  = 35     ; -- LC59
    "LOAD2"                        : INPUT_PIN  = 36     ; -- LC57
    "LOAD3"                        : INPUT_PIN  = 37     ; -- LC56
    "S"                            : INPUT_PIN  = 33     ; -- LC64
    "C"                            : OUTPUT_PIN = 81     ; -- LC128
    "JISHU0"                       : OUTPUT_PIN = 80     ; -- LC126
    "JISHU1"                       : OUTPUT_PIN = 79     ; -- LC125
    "JISHU2"                       : OUTPUT_PIN = 77     ; -- LC123
    "JISHU3"                       : OUTPUT_PIN = 76     ; -- LC120
    "|LPM_ADD_SUB:92|addcore:adder|addcore:adder0|result_node2" : LOCATION   = LC113  ;

END;

INTERNAL_INFO "counter"
BEGIN
	DEVICE = EPM7128SLC84-10;
	LC128   : LORAX = "G202R0,PA31R0C7";
	LC120   : LORAX = "G113R0,PA10R0C7";
	LC123   : LORAX = "G144R0,PA18R0C7";
	LC125   : LORAX = "G199R0,PA28R0C7";
	LC126   : LORAX = "G200R0,PA32R0C7";
	OH34R0P31 : LORAX = "G154R0,PA23R0C7";
	OH63R0P33 : LORAX = "G11R0,PA2R0C7";
	OH131R0P2 : LORAX = "G24R0,PA0R0C7";
	OH55R0P37 : LORAX = "G158R0,PA26R0C7";
	LC113   : LORAX = "G53R0,PA8R0C7";
	OH56R0P36 : LORAX = "G66R0,PA13R0C7";
	OH58R0P35 : LORAX = "G67R0,PA12R0C7";
	OH60R0P34 : LORAX = "G9R0,PA4R0C7";
END;