📄 tcdg.vhdl.txt
字号:
when "101100" => sortie<="0111";
when "101101" => sortie<="0010";
when "101110" => sortie<="1000";
when "101111" => sortie<="1101";
when "110000" => sortie<="1111";
when "110001" => sortie<="0110";
when "110010" => sortie<="1001";
when "110011" => sortie<="1111";
when "110100" => sortie<="1100";
when "110101" => sortie<="0000";
when "110110" => sortie<="0101";
when "110111" => sortie<="1001";
when "111000" => sortie<="0110";
when "111001" => sortie<="1010";
when "111010" => sortie<="0011";
when "111011" => sortie<="0100";
when "111100" => sortie<="0000";
when "111101" => sortie<="0101";
when "111110" => sortie<="1110";
when others => sortie<="0011";
end case;
end process;
end simple;
--------------------------------------------------------------------------
------------------------------------------------------ SUBS_6 ------------
--------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity subs_6 is
port (
entree : in std_logic_vector(5 downto 0);
sortie : out std_logic_vector(3 downto 0)
);
end;
---------- Architecture subs_6 ----------
library ieee, work;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
architecture simple of subs_6 is
begin
P11 : process(entree)
begin
case entree is
when "000000" => sortie<="1100";
when "000001" => sortie<="1010";
when "000010" => sortie<="0001";
when "000011" => sortie<="1111";
when "000100" => sortie<="1010";
when "000101" => sortie<="0100";
when "000110" => sortie<="1111";
when "000111" => sortie<="0010";
when "001000" => sortie<="1001";
when "001001" => sortie<="0111";
when "001010" => sortie<="0010";
when "001011" => sortie<="1100";
when "001100" => sortie<="0110";
when "001101" => sortie<="1001";
when "001110" => sortie<="1000";
when "001111" => sortie<="0101";
when "010000" => sortie<="0000";
when "010001" => sortie<="0110";
when "010010" => sortie<="1101";
when "010011" => sortie<="0001";
when "010100" => sortie<="0011";
when "010101" => sortie<="1101";
when "010110" => sortie<="0100";
when "010111" => sortie<="1110";
when "011000" => sortie<="1110";
when "011001" => sortie<="0000";
when "011010" => sortie<="0111";
when "011011" => sortie<="1011";
when "011100" => sortie<="0101";
when "011101" => sortie<="0011";
when "011110" => sortie<="1011";
when "011111" => sortie<="1000";
when "100000" => sortie<="1001";
when "100001" => sortie<="0100";
when "100010" => sortie<="1110";
when "100011" => sortie<="0011";
when "100100" => sortie<="1111";
when "100101" => sortie<="0010";
when "100110" => sortie<="0101";
when "100111" => sortie<="1100";
when "101000" => sortie<="0010";
when "101001" => sortie<="1001";
when "101010" => sortie<="1000";
when "101011" => sortie<="0101";
when "101100" => sortie<="1100";
when "101101" => sortie<="1111";
when "101110" => sortie<="0011";
when "101111" => sortie<="1010";
when "110000" => sortie<="0111";
when "110001" => sortie<="1011";
when "110010" => sortie<="0000";
when "110011" => sortie<="1110";
when "110100" => sortie<="0100";
when "110101" => sortie<="0001";
when "110110" => sortie<="1010";
when "110111" => sortie<="0111";
when "111000" => sortie<="0001";
when "111001" => sortie<="0110";
when "111010" => sortie<="1101";
when "111011" => sortie<="0000";
when "111100" => sortie<="1011";
when "111101" => sortie<="1000";
when "111110" => sortie<="0110";
when others => sortie<="1101";
end case;
end process;
end simple;
--------------------------------------------------------------------------
------------------------------------------------------ SUBS_7 ------------
--------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity subs_7 is
port (
entree : in std_logic_vector(5 downto 0);
sortie : out std_logic_vector(3 downto 0)
);
end;
---------- Architecture subs_7 ----------
library ieee, work;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
architecture simple of subs_7 is
begin
P12 : process(entree)
begin
case entree is
when "000000" => sortie<="0100";
when "000001" => sortie<="1101";
when "000010" => sortie<="1011";
when "000011" => sortie<="0000";
when "000100" => sortie<="0010";
when "000101" => sortie<="1011";
when "000110" => sortie<="1110";
when "000111" => sortie<="0111";
when "001000" => sortie<="1111";
when "001001" => sortie<="0100";
when "001010" => sortie<="0000";
when "001011" => sortie<="1001";
when "001100" => sortie<="1000";
when "001101" => sortie<="0001";
when "001110" => sortie<="1101";
when "001111" => sortie<="1010";
when "010000" => sortie<="0011";
when "010001" => sortie<="1110";
when "010010" => sortie<="1100";
when "010011" => sortie<="0011";
when "010100" => sortie<="1001";
when "010101" => sortie<="0101";
when "010110" => sortie<="0111";
when "010111" => sortie<="1100";
when "011000" => sortie<="0101";
when "011001" => sortie<="0010";
when "011010" => sortie<="1010";
when "011011" => sortie<="1111";
when "011100" => sortie<="0110";
when "011101" => sortie<="1000";
when "011110" => sortie<="0001";
when "011111" => sortie<="0110";
when "100000" => sortie<="0001";
when "100001" => sortie<="0110";
when "100010" => sortie<="0100";
when "100011" => sortie<="1011";
when "100100" => sortie<="1011";
when "100101" => sortie<="1101";
when "100110" => sortie<="1101";
when "100111" => sortie<="1000";
when "101000" => sortie<="1100";
when "101001" => sortie<="0001";
when "101010" => sortie<="0011";
when "101011" => sortie<="0100";
when "101100" => sortie<="0111";
when "101101" => sortie<="1010";
when "101110" => sortie<="1110";
when "101111" => sortie<="0111";
when "110000" => sortie<="1010";
when "110001" => sortie<="1001";
when "110010" => sortie<="1111";
when "110011" => sortie<="0101";
when "110100" => sortie<="0110";
when "110101" => sortie<="0000";
when "110110" => sortie<="1000";
when "110111" => sortie<="1111";
when "111000" => sortie<="0000";
when "111001" => sortie<="1110";
when "111010" => sortie<="0101";
when "111011" => sortie<="0010";
when "111100" => sortie<="1001";
when "111101" => sortie<="0011";
when "111110" => sortie<="0010";
when others => sortie<="1100";
end case;
end process;
end simple;
--------------------------------------------------------------------------
------------------------------------------------------ SUBS_8 ------------
--------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
entity subs_8 is
port (
entree : in std_logic_vector(5 downto 0);
sortie : out std_logic_vector(3 downto 0)
);
end;
---------- Architecture subs_8 ----------
library ieee, work;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
architecture simple of subs_8 is
begin
P13 : process(entree)
begin
case entree is
when "000000" => sortie<="1101";
when "000001" => sortie<="0001";
when "000010" => sortie<="0010";
when "000011" => sortie<="1111";
when "000100" => sortie<="1000";
when "000101" => sortie<="1101";
when "000110" => sortie<="0100";
when "000111" => sortie<="1000";
when "001000" => sortie<="0110";
when "001001" => sortie<="1010";
when "001010" => sortie<="1111";
when "001011" => sortie<="0011";
when "001100" => sortie<="1011";
when "001101" => sortie<="0111";
when "001110" => sortie<="0001";
when "001111" => sortie<="0100";
when "010000" => sortie<="1010";
when "010001" => sortie<="1100";
when "010010" => sortie<="1001";
when "010011" => sortie<="0101";
when "010100" => sortie<="0011";
when "010101" => sortie<="0110";
when "010110" => sortie<="1110";
when "010111" => sortie<="1011";
when "011000" => sortie<="0101";
when "011001" => sortie<="0000";
when "011010" => sortie<="0000";
when "011011" => sortie<="1110";
when "011100" => sortie<="1100";
when "011101" => sortie<="1001";
when "011110" => sortie<="0111";
when "011111" => sortie<="0010";
when "100000" => sortie<="0111";
when "100001" => sortie<="0010";
when "100010" => sortie<="1011";
when "100011" => sortie<="0001";
when "100100" => sortie<="0100";
when "100101" => sortie<="1110";
when "100110" => sortie<="0001";
when "100111" => sortie<="0111";
when "101000" => sortie<="1001";
when "101001" => sortie<="0100";
when "101010" => sortie<="1100";
when "101011" => sortie<="1010";
when "101100" => sortie<="1110";
when "101101" => sortie<="1000";
when "101110" => sortie<="0010";
when "101111" => sortie<="1101";
when "110000" => sortie<="0000";
when "110001" => sortie<="1111";
when "110010" => sortie<="0110";
when "110011" => sortie<="1100";
when "110100" => sortie<="1010";
when "110101" => sortie<="1001";
when "110110" => sortie<="1101";
when "110111" => sortie<="0000";
when "111000" => sortie<="1111";
when "111001" => sortie<="0011";
when "111010" => sortie<="0011";
when "111011" => sortie<="0101";
when "111100" => sortie<="0101";
when "111101" => sortie<="0110";
when "111110" => sortie<="1000";
when others => sortie<="1011";
end case;
end process;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -