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# Reading D:/program files/modelsim se 6.1b/tcl/vsim/pref.tcl
# // ModelSim SE 6.1b Sep 8 2005
# //
# // Copyright Mentor Graphics Corporation 2005
# // All Rights Reserved.
# //
# // THIS WORK CONTAINS TRADE SECRET AND
# // PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# // OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# // AND IS SUBJECT TO LICENSE TERMS.
# //
# OpenFile "E:/feng/verilog/riscmcu/riscmcu.mpf"
# Loading project riscmcu
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(47): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'alu_out'.
# Region: /riscmcu/alu
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(48): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'in'.
# Region: /riscmcu/datact1
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 21 of file "rom_data". Expected 256, found 21. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v was successful.
# Compile of register.v was successful.
# Compile of riscmcu.v was successful.
# Compile of accum.v was successful.
# 13 compiles, 0 failed with no errors.
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(47): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'alu_out'.
# Region: /riscmcu/alu
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(48): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'in'.
# Region: /riscmcu/datact1
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# riscmcu
# riscmcu
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 21 of file "rom_data". Expected 256, found 21. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
write format wave -window .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf E:/feng/verilog/riscmcu/wave.do
.main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf.tree.tree1 writeeditcmd -file E:/feng/verilog/riscmcu/wave.do -append
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v was successful.
# Compile of register.v was successful.
# Compile of riscmcu.v was successful.
# Compile of accum.v was successful.
# 13 compiles, 0 failed with no errors.
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(46): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'data'.
# Region: /riscmcu/accum
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(47): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'alu_out'.
# Region: /riscmcu/alu
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(48): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'in'.
# Region: /riscmcu/datact1
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# riscmcu
# riscmcu
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 21 of file "rom_data". Expected 256, found 21. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v was successful.
# Compile of register.v was successful.
# Compile of riscmcu.v was successful.
# Compile of accum.v was successful.
# 13 compiles, 0 failed with no errors.
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(47): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'alu_out'.
# Region: /riscmcu/alu
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(48): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'in'.
# Region: /riscmcu/datact1
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# riscmcu
# riscmcu
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 21 of file "rom_data". Expected 256, found 21. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v was successful.
# Compile of register.v was successful.
# Compile of riscmcu.v was successful.
# Compile of accum.v was successful.
# 13 compiles, 0 failed with no errors.
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(46): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'data'.
# Region: /riscmcu/accum
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(47): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'alu_out'.
# Region: /riscmcu/alu
# ** Warning: (vsim-3015) E:/feng/verilog/riscmcu/riscmcu.v(48): [PCDPC] - Port size (8 or 8) does not match connection size (1) for port 'in'.
# Region: /riscmcu/datact1
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# riscmcu
# riscmcu
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 21 of file "rom_data". Expected 256, found 21. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v was successful.
# Compile of register.v was successful.
# Compile of riscmcu.v was successful.
# Compile of accum.v was successful.
# 13 compiles, 0 failed with no errors.
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# riscmcu
# riscmcu
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 21 of file "rom_data". Expected 256, found 21. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
restart
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 23 of file "rom_data". Expected 256, found 23. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
restart
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 26 of file "rom_data". Expected 256, found 25. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v failed with 1 errors.
# Compile of register.v was successful.
# Compile of riscmcu.v failed with 1 errors.
# Compile of accum.v was successful.
# 13 compiles, 2 failed with 2 errors.
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v was successful.
# Compile of register.v was successful.
# Compile of riscmcu.v was successful.
# Compile of accum.v was successful.
# 13 compiles, 0 failed with no errors.
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# riscmcu
# riscmcu
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 26 of file "rom_data". Expected 256, found 25. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
restart
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 32 of file "rom_data". Expected 256, found 31. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
restart
# Compile of rom.v was successful.
# Compile of addr_decode.v was successful.
# Compile of adr.v was successful.
# Compile of alu.v was successful.
# Compile of clk_gen.v was successful.
# Compile of counter.v was successful.
# Compile of datact1.v was successful.
# Compile of machine.v was successful.
# Compile of machinect1.v was successful.
# Compile of ram.v was successful.
# Compile of register.v was successful.
# Compile of riscmcu.v was successful.
# Compile of accum.v was successful.
# 13 compiles, 0 failed with no errors.
vsim work.riscmcu
# vsim work.riscmcu
# Loading work.riscmcu
# Loading work.clk_gen
# Loading work.register
# Loading work.accum
# Loading work.alu
# Loading work.datact1
# Loading work.adr
# Loading work.counter
# Loading work.machinect1
# Loading work.machine
# Loading work.addr_decode
# Loading work.ram
# Loading work.rom
do E:/feng/verilog/riscmcu/wave.do
# .main_pane.mdi.interior.cs.vm.paneset.cli_6.wf.clip.cs.pw.wf
# riscmcu
# riscmcu
# 1
run -all
# ** Warning: (vsim-PLI-3408) Too few data words read on line 32 of file "rom_data". Expected 256, found 31. : rom.v(11)
# Time: 0 ns Iteration: 0 Instance: /riscmcu/rom
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