📄 separate.vhd
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--
-- File: separate.vhd
-- 将两位整数分解出个位和十位
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;
entity separate is
port (
clk10: in STD_LOGIC;
NumIn: in INTEGER range 0 to 40;
NumOutH: out INTEGER range 0 to 9;
NumOutL: out INTEGER range 0 to 9
);
end separate;
architecture rtl of separate is
begin
process(clk10)
begin
if rising_edge(clk10) then
if(NumIn>=40) then
NumOutH<=4;
NumOutL<=NumIn-40;
elsif(NumIn>=30) then
NumOutH<=3;
NumOutL<=NumIn-30;
elsif(NumIn>=20) then
NumOutH<=2;
NumOutL<=NumIn-20;
elsif(NumIn>=10) then
NumOutH<=1;
NumOutL<=NumIn-10;
else
NumOutH<=0;
NumOutL<=NumIn;
end if;
end if;
end process;
end rtl;
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