multiplexor.vhd

来自「Image_Filter_An_Image_halftone is perfor」· VHDL 代码 · 共 27 行

library IEEE;
use IEEE.std_logic_1164.all;

entity multiplexor is
    port (
        elige: in STD_LOGIC_VECTOR (1 downto 0);
        dirpro: in STD_LOGIC_VECTOR (14 downto 0);
        dirorig: in STD_LOGIC_VECTOR (14 downto 0);
        dircom: in STD_LOGIC_VECTOR (14 downto 0);
        direccion: out STD_LOGIC_VECTOR (14 downto 0)
    );
end multiplexor;

architecture multiplexor_arch of multiplexor is
begin

process(elige, dirorig, dirpro, dircom)
begin
  case elige is
	when "00" => direccion<=dircom;
	when "01" => direccion<=dirpro; 
	when "10" => direccion<=dirorig; 
	when others => direccion<=dirpro; 
  end case;
end process;	
end multiplexor_arch;