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📄 t2t.sim.rpt

📁 用VHDL实现的通信滑码处理
💻 RPT
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; Overwrite Waveform Inputs With Simulation Outputs               ; Off              ;               ;
+-----------------------------------------------------------------+------------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+---------------------------------------------------------------------------------------------------------------------------------------+
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|dpram_17k:FIFOram|altsyncram_sga1:altsyncram1|ALTSYNCRAM ;
+---------------------------------------------------------------------------------------------------------------------------------------+
Memory report data cannot be output to ASCII.
Please use Quartus II to view the memory report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      38.64 % ;
; Total nodes checked                                 ; 69           ;
; Total output ports checked                          ; 88           ;
; Total output ports with complete 1/0-value coverage ; 34           ;
; Total output ports with no 1/0-value coverage       ; 48           ;
; Total output ports with no 1-value coverage         ; 49           ;
; Total output ports with no 0-value coverage         ; 53           ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                                                                                                    ;
+-------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                                           ; Output Port Name                                                                                                                                      ; Output Port Type ;
+-------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+
; |T2T|clock                                                                                                                          ; |T2T|clock                                                                                                                                            ; regout           ;
; |T2T|write                                                                                                                          ; |T2T|write                                                                                                                                            ; regout           ;
; |T2T|dataout[0]~178                                                                                                                 ; |T2T|dataout[0]~178                                                                                                                                   ; combout          ;
; |T2T|sts[1]                                                                                                                         ; |T2T|sts[1]                                                                                                                                           ; regout           ;
; |T2T|sts[0]                                                                                                                         ; |T2T|sts[0]                                                                                                                                           ; regout           ;
; |T2T|dataout[0]~179                                                                                                                 ; |T2T|dataout[0]~179                                                                                                                                   ; combout          ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|valid_wreq                                             ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|valid_wreq                                                               ; combout          ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|valid_rreq                                             ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|valid_rreq                                                               ; combout          ;
; |T2T|c3flag                                                                                                                         ; |T2T|c3flag                                                                                                                                           ; regout           ;
; |T2T|c2flag                                                                                                                         ; |T2T|c2flag                                                                                                                                           ; regout           ;
; |T2T|datai[0]~134                                                                                                                   ; |T2T|datai[0]~134                                                                                                                                     ; combout          ;
; |T2T|sts[1]~196                                                                                                                     ; |T2T|sts[1]~196                                                                                                                                       ; combout          ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[5] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella5~COUT         ; cout0            ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[4] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella4~COUT         ; cout0            ;
; |T2T|datai[0]~135                                                                                                                   ; |T2T|datai[0]~135                                                                                                                                     ; combout          ;
; |T2T|sts[0]~198                                                                                                                     ; |T2T|sts[0]~198                                                                                                                                       ; combout          ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[0] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella0~COUT         ; cout0            ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[0] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella0~COUTCOUT1_11 ; cout1            ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[1] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella1~COUT         ; cout0            ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[1] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella1~COUTCOUT1_9  ; cout1            ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[2] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella2~COUT         ; cout0            ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[2] ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella2~COUTCOUT1    ; cout1            ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|b_non_empty~78                 ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|b_non_empty~78                                   ; combout          ;
; |T2T|c3i                                                                                                                            ; |T2T|c3i                                                                                                                                              ; regout           ;
; |T2T|c2i                                                                                                                            ; |T2T|c2i                                                                                                                                              ; regout           ;
; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|_~28                           ; |T2T|lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|_~28                                             ; combout          ;
; |T2T|C8                                                                                                                             ; |T2T|C8                                                                                                                                               ; combout          ;
; |T2T|data[0]                                                                                                                        ; |T2T|data[0]                                                                                                                                          ; combout          ;
; |T2T|C3                                                                                                                             ; |T2T|C3                                                                                                                                               ; combout          ;
; |T2T|C2                                                                                                                             ; |T2T|C2                                                                                                                                               ; combout          ;
; |T2T|COUT                                                                                                                           ; |T2T|COUT                                                                                                                                             ; padio            ;
; |T2T|RD                                                                                                                             ; |T2T|RD                                                                                                                                               ; padio            ;
; |T2T|WR                                                                                                                             ; |T2T|WR                                                                                                                                               ; padio            ;
; |T2T|slot                                                                                                                           ; |T2T|slot                                                                                                                                             ; padio            ;
+-------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------+------------------+

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