t2t.fit.eqn

用VHDL实现的通信滑码处理

H1L18_cout_0 = !H1L15 # !H1_safe_q[5];
H1L18 = CARRY(H1L18_cout_0);

--H1L19 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|cntr_ue8:rd_ptr_count|counter_cella5~COUTCOUT1_2 at LC_X21_Y5_N6
--operation mode is arithmetic

H1L19_cout_1 = !H1L16 # !H1_safe_q[5];
H1L19 = CARRY(H1L19_cout_1);


--H1_safe_q[6] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|cntr_ue8:rd_ptr_count|safe_q[6] at LC_X21_Y5_N7
--operation mode is normal

H1_safe_q[6]_carry_eqn = (!H1L11 & H1L18) # (H1L11 & H1L19);
H1_safe_q[6]_lut_out = H1_safe_q[6] $ (E1_valid_rreq & !H1_safe_q[6]_carry_eqn);
H1_safe_q[6] = DFFEAS(H1_safe_q[6]_lut_out, GLOBAL(clock), VCC, , , , , , );


--c3flag is c3flag at LC_X17_Y12_N6
--operation mode is normal

c3flag_lut_out = C3 & (c3flag & !read # !c3i) # !C3 & c3flag & !c3i & !read;
c3flag = DFFEAS(c3flag_lut_out, GLOBAL(C8), VCC, , , , , , );


--c2flag is c2flag at LC_X24_Y5_N8
--operation mode is normal

c2flag_lut_out = C2 & (!write & c2flag # !c2i) # !C2 & !write & c2flag & !c2i;
c2flag = DFFEAS(c2flag_lut_out, GLOBAL(C8), VCC, , , , , , );


--A1L21 is datai[0]~134 at LC_X17_Y12_N2
--operation mode is normal

A1L21 = c3flag & !sts[1] & !c2flag;


--startSend is startSend at LC_X24_Y5_N9
--operation mode is normal

startSend_lut_out = A1L22 & (startSend & A1L36 # !startSend & (!A1L32)) # !A1L22 & startSend;
startSend = DFFEAS(startSend_lut_out, GLOBAL(C8), VCC, , , , , , );


--A1L41 is sts[1]~196 at LC_X23_Y5_N2
--operation mode is normal

A1L41 = !sts[1] & c3flag & !c2flag & !startSend;


--J1_safe_q[6] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[6] at LC_X22_Y6_N7
--operation mode is normal

J1_safe_q[6]_carry_eqn = (!J1L11 & J1L18) # (J1L11 & J1L19);
J1_safe_q[6]_lut_out = J1_safe_q[6] $ (!J1_safe_q[6]_carry_eqn);
J1_safe_q[6] = DFFEAS(J1_safe_q[6]_lut_out, GLOBAL(clock), VCC, , F1L1, , , , );


--J1_safe_q[5] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[5] at LC_X22_Y6_N6
--operation mode is arithmetic

J1_safe_q[5]_carry_eqn = (!J1L11 & J1L15) # (J1L11 & J1L16);
J1_safe_q[5]_lut_out = J1_safe_q[5] $ (J1_safe_q[5]_carry_eqn);
J1_safe_q[5] = DFFEAS(J1_safe_q[5]_lut_out, GLOBAL(clock), VCC, , F1L1, , , , );

--J1L18 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella5~COUT at LC_X22_Y6_N6
--operation mode is arithmetic

J1L18_cout_0 = J1_safe_q[5] $ E1_valid_wreq # !J1L15;
J1L18 = CARRY(J1L18_cout_0);

--J1L19 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella5~COUTCOUT1_9 at LC_X22_Y6_N6
--operation mode is arithmetic

J1L19_cout_1 = J1_safe_q[5] $ E1_valid_wreq # !J1L16;
J1L19 = CARRY(J1L19_cout_1);


--J1_safe_q[4] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[4] at LC_X22_Y6_N5
--operation mode is arithmetic

J1_safe_q[4]_carry_eqn = (!J1L11 & GND) # (J1L11 & VCC);
J1_safe_q[4]_lut_out = J1_safe_q[4] $ (!J1_safe_q[4]_carry_eqn);
J1_safe_q[4] = DFFEAS(J1_safe_q[4]_lut_out, GLOBAL(clock), VCC, , F1L1, , , , );

--J1L15 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella4~COUT at LC_X22_Y6_N5
--operation mode is arithmetic

J1L15_cout_0 = !J1L11 & (J1_safe_q[4] $ !E1_valid_wreq);
J1L15 = CARRY(J1L15_cout_0);

--J1L16 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella4~COUTCOUT1_9 at LC_X22_Y6_N5
--operation mode is arithmetic

J1L16_cout_1 = !J1L11 & (J1_safe_q[4] $ !E1_valid_wreq);
J1L16 = CARRY(J1L16_cout_1);


--A1L32 is rtl~26 at LC_X23_Y5_N6
--operation mode is normal

A1L32 = !J1_safe_q[4] & !J1_safe_q[6] & (!J1_safe_q[5]);


--A1L22 is datai[0]~135 at LC_X23_Y5_N1
--operation mode is normal

A1L22 = !sts[0] & !sts[1] & !c2flag & c3flag;


--A1L39 is sts[0]~198 at LC_X24_Y5_N4
--operation mode is normal

A1L39 = !sts[1] & (!c2flag);


--F1L3 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|b_full~85 at LC_X21_Y6_N3
--operation mode is normal

F1L3 = write & F1_b_non_empty & J1_safe_q[6] & !read;


--J1_safe_q[0] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[0] at LC_X22_Y6_N1
--operation mode is arithmetic

J1_safe_q[0]_lut_out = !J1_safe_q[0];
J1_safe_q[0] = DFFEAS(J1_safe_q[0]_lut_out, GLOBAL(clock), VCC, , F1L1, , , , );

--J1L2 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella0~COUT at LC_X22_Y6_N1
--operation mode is arithmetic

J1L2_cout_0 = J1_safe_q[0] $ !E1_valid_wreq;
J1L2 = CARRY(J1L2_cout_0);

--J1L3 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella0~COUTCOUT1_11 at LC_X22_Y6_N1
--operation mode is arithmetic

J1L3_cout_1 = J1_safe_q[0] $ !E1_valid_wreq;
J1L3 = CARRY(J1L3_cout_1);


--J1_safe_q[1] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[1] at LC_X22_Y6_N2
--operation mode is arithmetic

J1_safe_q[1]_lut_out = J1_safe_q[1] $ (J1L2);
J1_safe_q[1] = DFFEAS(J1_safe_q[1]_lut_out, GLOBAL(clock), VCC, , F1L1, , , , );

--J1L5 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella1~COUT at LC_X22_Y6_N2
--operation mode is arithmetic

J1L5_cout_0 = J1_safe_q[1] $ E1_valid_wreq # !J1L2;
J1L5 = CARRY(J1L5_cout_0);

--J1L6 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella1~COUTCOUT1_9 at LC_X22_Y6_N2
--operation mode is arithmetic

J1L6_cout_1 = J1_safe_q[1] $ E1_valid_wreq # !J1L3;
J1L6 = CARRY(J1L6_cout_1);


--J1_safe_q[3] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[3] at LC_X22_Y6_N4
--operation mode is arithmetic

J1_safe_q[3]_lut_out = J1_safe_q[3] $ (J1L8);
J1_safe_q[3] = DFFEAS(J1_safe_q[3]_lut_out, GLOBAL(clock), VCC, , F1L1, , , , );

--J1L11 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella3~COUT at LC_X22_Y6_N4
--operation mode is arithmetic

J1L11 = J1L12;


--J1_safe_q[2] is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|safe_q[2] at LC_X22_Y6_N3
--operation mode is arithmetic

J1_safe_q[2]_lut_out = J1_safe_q[2] $ (!J1L5);
J1_safe_q[2] = DFFEAS(J1_safe_q[2]_lut_out, GLOBAL(clock), VCC, , F1L1, , , , );

--J1L8 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella2~COUT at LC_X22_Y6_N3
--operation mode is arithmetic

J1L8_cout_0 = !J1L5 & (J1_safe_q[2] $ !E1_valid_wreq);
J1L8 = CARRY(J1L8_cout_0);

--J1L9 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|cntr_cd7:count_usedw|counter_cella2~COUTCOUT1 at LC_X22_Y6_N3
--operation mode is arithmetic

J1L9_cout_1 = !J1L6 & (J1_safe_q[2] $ !E1_valid_wreq);
J1L9 = CARRY(J1L9_cout_1);


--F1L4 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|b_full~86 at LC_X22_Y6_N9
--operation mode is normal

F1L4 = J1_safe_q[2] & J1_safe_q[5] & J1_safe_q[4] & J1_safe_q[3];


--F1L5 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|b_full~87 at LC_X21_Y6_N4
--operation mode is normal

F1L5 = J1_safe_q[0] & J1_safe_q[1] & (F1L4);


--F1L7 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|b_non_empty~77 at LC_X22_Y6_N8
--operation mode is normal

F1L7 = J1_safe_q[1] # J1_safe_q[2] # J1_safe_q[3] # !J1_safe_q[0];


--F1L8 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|b_non_empty~78 at LC_X21_Y6_N8
--operation mode is normal

F1L8 = F1L7 # !read # !A1L32;


--c3i is c3i at LC_X17_Y12_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

c3i_lut_out = GND;
c3i = DFFEAS(c3i_lut_out, GLOBAL(C8), VCC, , , C3, , , VCC);


--c2i is c2i at LC_X25_Y5_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

c2i_lut_out = GND;
c2i = DFFEAS(c2i_lut_out, GLOBAL(C8), VCC, , , C2, , , VCC);


--cnt[3] is cnt[3] at LC_X23_Y5_N4
--operation mode is normal

cnt[3]_lut_out = startSend & (cnt[3] $ (A1L1 & cnt[2]));
cnt[3] = DFFEAS(cnt[3]_lut_out, GLOBAL(C8), VCC, , A1L15, , , , );


--cnt[2] is cnt[2] at LC_X24_Y5_N5
--operation mode is normal

cnt[2]_lut_out = startSend & (cnt[2] $ (cnt[1] & cnt[0]));
cnt[2] = DFFEAS(cnt[2]_lut_out, GLOBAL(C8), VCC, , A1L15, , , , );


--cnt[1] is cnt[1] at LC_X24_Y5_N6
--operation mode is normal

cnt[1]_lut_out = startSend & (cnt[1] $ cnt[0]);
cnt[1] = DFFEAS(cnt[1]_lut_out, GLOBAL(C8), VCC, , A1L15, , , , );


--cnt[0] is cnt[0] at LC_X24_Y5_N0
--operation mode is normal

cnt[0]_lut_out = startSend & (!cnt[0]);
cnt[0] = DFFEAS(cnt[0]_lut_out, GLOBAL(C8), VCC, , A1L15, , , , );


--A1L36 is startSend~213 at LC_X24_Y5_N1
--operation mode is normal

A1L36 = !cnt[0] # !cnt[2] # !cnt[1] # !cnt[3];


--F1L1 is lpm_fifo:U1|scfifo:myFIFO|scfifo_sin:auto_generated|a_dpfifo_pek:dpfifo|a_fefifo_t7f:fifo_state|_~28 at LC_X21_Y6_N1
--operation mode is normal

F1L1 = read & (F1_b_non_empty $ (write & !F1_b_full)) # !read & (write & !F1_b_full);


--A1L1 is add~112 at LC_X24_Y5_N2
--operation mode is normal

A1L1 = cnt[1] & (cnt[0]);


--A1L15 is cnt[3]~79 at LC_X23_Y5_N3
--operation mode is normal

A1L15 = A1L22 & (startSend # !A1L32);


--C8 is C8 at PIN_L2
--operation mode is input

C8 = INPUT();


--data[0] is data[0] at PIN_P13
--operation mode is input

data[0] = INPUT();


--C3 is C3 at PIN_P15
--operation mode is input

C3 = INPUT();


--C2 is C2 at PIN_AA13
--operation mode is input

C2 = INPUT();


--dataout[0] is dataout[0] at PIN_C13
--operation mode is output

dataout[0] = OUTPUT(A1L27Q);


--q[0] is q[0] at PIN_Y14
--operation mode is output

q[0] = OUTPUT(K1_q_b[0]);


--COUT is COUT at PIN_N20
--operation mode is output

COUT = OUTPUT(clock);


--RD is RD at PIN_N15
--operation mode is output

RD = OUTPUT(read);


--WR is WR at PIN_AB12
--operation mode is output

WR = OUTPUT(write);


--slot is slot at PIN_P17
--operation mode is output

slot = OUTPUT(sloti);