inverter.stx

Self timed pipelined adder

Release 8.1i - xst I.24
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.
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=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling vhdl file "C:/Documents and Settings/People/Desktop/VLSIASS2/Inverter.vhd" in Library work.
Entity <Inverter> compiled.
Entity <Inverter> (Architecture <Behavioral>) compiled.
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Total memory usage is 85600 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)