tb_pipeline_adder.fdo

Self timed pipelined adder

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Fri May 19 11:30:55 PM W. Australia Standard Time 2006
##
vlib work
vcom -explicit  -93 Inverter.vhd
vcom -explicit  -93 C_MULLER_GATE.vhd
vcom -explicit  -93 Register.vhd
vcom -explicit  -93 Hand_Shake.vhd
vcom -explicit  -93 Full_Adder.vhd
vcom -explicit  -93 Delay_Element.vhd
vcom -explicit  -93 Two_Delays.vhd
vcom -explicit  -93 1_Bit_Pipeline_Adder.vhd
vcom -explicit  -93 PipeLine_Adder.vhd
vcom -explicit  -93 TB_Pipeline_Adder.vhw
vsim -t 1ps   -lib work TB_Pipeline_Adder
do {TB_Pipeline_Adder.udo}
view wave
add wave *
view structure
view signals
run -all